Search

Sonya C. Harris

Examiner (ID: 12542)

Most Active Art Unit
3309
Art Unit(s)
3739, 3309, 3311, 3736
Total Applications
399
Issued Applications
311
Pending Applications
46
Abandoned Applications
42

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20397078 [patent_doc_number] => 20250372553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => 3D IC STRUCTURE [patent_app_type] => utility [patent_app_number] => 19/280988 [patent_app_country] => US [patent_app_date] => 2025-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7616 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19280988 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/280988
3D IC STRUCTURE Jul 24, 2025 Pending
Array ( [id] => 20367585 [patent_doc_number] => 20250357397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-20 [patent_title] => 3D IC STRUCTURE [patent_app_type] => utility [patent_app_number] => 19/281045 [patent_app_country] => US [patent_app_date] => 2025-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7634 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19281045 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/281045
3D IC STRUCTURE Jul 24, 2025 Pending
Array ( [id] => 20324678 [patent_doc_number] => 20250336766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => OPTIMIZATION OF THE THERMAL PERFORMANCE OF THE 3D ICS UTILIZING THE INTEGRATED CHIP-SIZE DOUBLE-LAYER OR MULTI-LAYER MICROCHANNELS [patent_app_type] => utility [patent_app_number] => 19/177495 [patent_app_country] => US [patent_app_date] => 2025-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2250 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19177495 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/177495
OPTIMIZATION OF THE THERMAL PERFORMANCE OF THE 3D ICS UTILIZING THE INTEGRATED CHIP-SIZE DOUBLE-LAYER OR MULTI-LAYER MICROCHANNELS Apr 10, 2025 Pending
Array ( [id] => 20103109 [patent_doc_number] => 20250233045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE ASSEMBLY WITH EDGE INTERCONNECTION AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 19/059275 [patent_app_country] => US [patent_app_date] => 2025-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28372 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19059275 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/059275
SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE ASSEMBLY WITH EDGE INTERCONNECTION AND METHOD OF FORMING THE SAME Feb 20, 2025 Pending
Array ( [id] => 19972454 [patent_doc_number] => 12341075 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-06-24 [patent_title] => Systems and methods for cooling electronic circuits [patent_app_type] => utility [patent_app_number] => 18/967029 [patent_app_country] => US [patent_app_date] => 2024-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 6799 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18967029 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/967029
Systems and methods for cooling electronic circuits Dec 2, 2024 Issued
Array ( [id] => 19936827 [patent_doc_number] => 12310047 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-05-20 [patent_title] => Laterally-diffused metal-oxide-semiconductor devices with a field plate [patent_app_type] => utility [patent_app_number] => 18/907770 [patent_app_country] => US [patent_app_date] => 2024-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18907770 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/907770
Laterally-diffused metal-oxide-semiconductor devices with a field plate Oct 6, 2024 Issued
Array ( [id] => 19672674 [patent_doc_number] => 12185469 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-12-31 [patent_title] => Lead frame and method for stacking discrete components to be embedded in semiconductor device [patent_app_type] => utility [patent_app_number] => 18/821747 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4521 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18821747 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/821747
Lead frame and method for stacking discrete components to be embedded in semiconductor device Aug 29, 2024 Issued
Array ( [id] => 19835770 [patent_doc_number] => 20250087556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => OPTIMIZATION OF THE THERMAL PERFORMANCE OF THE 3D ICS UTILIZING THE INTEGRATED CHIP-SIZE DOUBLE-LAYER OR MULTI-LAYER MICROCHANNELS [patent_app_type] => utility [patent_app_number] => 18/793277 [patent_app_country] => US [patent_app_date] => 2024-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6641 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18793277 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/793277
Optimization of the thermal performance of the 3D ICs utilizing the integrated chip-size double-layer or multi-layer microchannels Aug 1, 2024 Issued
Array ( [id] => 19720404 [patent_doc_number] => 12205949 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-01-21 [patent_title] => High-voltage semiconductor device structures [patent_app_type] => utility [patent_app_number] => 18/758069 [patent_app_country] => US [patent_app_date] => 2024-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3525 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18758069 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/758069
High-voltage semiconductor device structures Jun 27, 2024 Issued
Array ( [id] => 20096302 [patent_doc_number] => 20250226238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/861583 [patent_app_country] => US [patent_app_date] => 2024-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5952 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18861583 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/861583
Method for manufacturing semiconductor device and semiconductor device May 28, 2024 Issued
Array ( [id] => 19349243 [patent_doc_number] => 20240258207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => LEAD FRAME ASSEMBLY FOR A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/631535 [patent_app_country] => US [patent_app_date] => 2024-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3470 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18631535 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/631535
LEAD FRAME ASSEMBLY FOR A SEMICONDUCTOR DEVICE Apr 9, 2024 Pending
Array ( [id] => 19335753 [patent_doc_number] => 20240250183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/626592 [patent_app_country] => US [patent_app_date] => 2024-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23865 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626592 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626592
Semiconductor device Apr 3, 2024 Issued
Array ( [id] => 20274877 [patent_doc_number] => 12444662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Semiconductor package and method of manufacturing semiconductor package [patent_app_type] => utility [patent_app_number] => 18/626579 [patent_app_country] => US [patent_app_date] => 2024-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 2241 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626579 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626579
Semiconductor package and method of manufacturing semiconductor package Apr 3, 2024 Issued
Array ( [id] => 19392805 [patent_doc_number] => 20240282675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => POWER MODULE SEMICONDUCTOR DEVICE AND INVERTER EQUIPMENT, AND FABRICATION METHOD OF THE POWER MODULE SEMICONDUCTOR DEVICE, AND METALLIC MOLD [patent_app_type] => utility [patent_app_number] => 18/622153 [patent_app_country] => US [patent_app_date] => 2024-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19561 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622153 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/622153
Power module semiconductor device and inverter equipment, and fabrication method of the power module semiconductor device, and metallic mold Mar 28, 2024 Issued
Array ( [id] => 19321477 [patent_doc_number] => 20240243024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => FILM COVERS FOR SENSOR PACKAGES [patent_app_type] => utility [patent_app_number] => 18/618843 [patent_app_country] => US [patent_app_date] => 2024-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618843 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/618843
FILM COVERS FOR SENSOR PACKAGES Mar 26, 2024 Pending
Array ( [id] => 19288098 [patent_doc_number] => 20240224581 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => DISPLAY DEVICE WITH BLOCK MEMBERS [patent_app_type] => utility [patent_app_number] => 18/610102 [patent_app_country] => US [patent_app_date] => 2024-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16251 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610102 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/610102
Display device with block members Mar 18, 2024 Issued
Array ( [id] => 20134062 [patent_doc_number] => 12376393 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Image sensor including control electrode, transparent electrode, and connection layer electrically connecting control electrode to side surface of transparent electrode [patent_app_type] => utility [patent_app_number] => 18/598856 [patent_app_country] => US [patent_app_date] => 2024-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 4394 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18598856 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/598856
Image sensor including control electrode, transparent electrode, and connection layer electrically connecting control electrode to side surface of transparent electrode Mar 6, 2024 Issued
Array ( [id] => 19314426 [patent_doc_number] => 12040251 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-07-16 [patent_title] => 3D cooling block for heat dissipation in electronic devices [patent_app_type] => utility [patent_app_number] => 18/596673 [patent_app_country] => US [patent_app_date] => 2024-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 6112 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18596673 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/596673
3D cooling block for heat dissipation in electronic devices Mar 5, 2024 Issued
Array ( [id] => 19267362 [patent_doc_number] => 20240211064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => DISPLAY PANEL AND DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/596649 [patent_app_country] => US [patent_app_date] => 2024-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18459 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18596649 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/596649
Display panel and display apparatus Mar 5, 2024 Issued
Array ( [id] => 19335623 [patent_doc_number] => 20240250053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/596399 [patent_app_country] => US [patent_app_date] => 2024-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6458 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18596399 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/596399
Semiconductor device and semiconductor package Mar 4, 2024 Issued
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