Search

Sophia T. Nguyen

Examiner (ID: 13973)

Most Active Art Unit
2822
Art Unit(s)
2893, 2822, 2821
Total Applications
655
Issued Applications
250
Pending Applications
133
Abandoned Applications
284

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17417224 [patent_doc_number] => 20220052128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/274777 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17274777 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/274777
DISPLAY DEVICE Sep 9, 2018 Abandoned
Array ( [id] => 13741095 [patent_doc_number] => 20180375017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => MAGNETO-RESISTIVE CHIP PACKAGE INCLUDING SHIELDING STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/121266 [patent_app_country] => US [patent_app_date] => 2018-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12482 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16121266 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/121266
Magneto-resistive chip package including shielding structure Sep 3, 2018 Issued
Array ( [id] => 16292694 [patent_doc_number] => 10769546 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-08 [patent_title] => Microwave integrated quantum circuits with cap wafer and methods for making the same [patent_app_type] => utility [patent_app_number] => 16/113382 [patent_app_country] => US [patent_app_date] => 2018-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 52 [patent_no_of_words] => 31425 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16113382 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/113382
Microwave integrated quantum circuits with cap wafer and methods for making the same Aug 26, 2018 Issued
Array ( [id] => 13629975 [patent_doc_number] => 20180366540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => SEMICONDUCTOR DEVICES COMPRISING VIAS AND CAPACITORS [patent_app_type] => utility [patent_app_number] => 16/110615 [patent_app_country] => US [patent_app_date] => 2018-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3711 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16110615 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/110615
SEMICONDUCTOR DEVICES COMPRISING VIAS AND CAPACITORS Aug 22, 2018 Abandoned
Array ( [id] => 13613453 [patent_doc_number] => 20180358276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => SEMICONDUCTOR DEVICE PACKAGE [patent_app_type] => utility [patent_app_number] => 16/107887 [patent_app_country] => US [patent_app_date] => 2018-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7864 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16107887 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/107887
SEMICONDUCTOR DEVICE PACKAGE Aug 20, 2018 Abandoned
Array ( [id] => 13598315 [patent_doc_number] => 20180350706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-06 [patent_title] => SYSTEM IN PACKAGE PROCESS FLOW [patent_app_type] => utility [patent_app_number] => 16/100060 [patent_app_country] => US [patent_app_date] => 2018-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4804 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16100060 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/100060
SYSTEM IN PACKAGE PROCESS FLOW Aug 8, 2018 Abandoned
Array ( [id] => 13598777 [patent_doc_number] => 20180350937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-06 [patent_title] => METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/056564 [patent_app_country] => US [patent_app_date] => 2018-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2939 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16056564 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/056564
Method for fabricating a semiconductor device Aug 6, 2018 Issued
Array ( [id] => 16308696 [patent_doc_number] => 10777504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-15 [patent_title] => Interconnect structure for semiconductor device and methods of fabrication thereof [patent_app_type] => utility [patent_app_number] => 16/048957 [patent_app_country] => US [patent_app_date] => 2018-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 7510 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16048957 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/048957
Interconnect structure for semiconductor device and methods of fabrication thereof Jul 29, 2018 Issued
Array ( [id] => 13528423 [patent_doc_number] => 20180315754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/022713 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4796 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16022713 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/022713
Semiconductor device Jun 28, 2018 Issued
Array ( [id] => 15791465 [patent_doc_number] => 10629464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => Plasma processing apparatus and heater temperature control method [patent_app_type] => utility [patent_app_number] => 16/013189 [patent_app_country] => US [patent_app_date] => 2018-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11029 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16013189 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/013189
Plasma processing apparatus and heater temperature control method Jun 19, 2018 Issued
Array ( [id] => 16148403 [patent_doc_number] => 10707283 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => Organic EL element, organic EL display panel using same, and organic EL display panel manufacturing method [patent_app_type] => utility [patent_app_number] => 16/001399 [patent_app_country] => US [patent_app_date] => 2018-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 30 [patent_no_of_words] => 13087 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16001399 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/001399
Organic EL element, organic EL display panel using same, and organic EL display panel manufacturing method Jun 5, 2018 Issued
Array ( [id] => 16567061 [patent_doc_number] => 10892438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Organic light-emitting display device having an upper substrate formed by a metal and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 15/985919 [patent_app_country] => US [patent_app_date] => 2018-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 7716 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15985919 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/985919
Organic light-emitting display device having an upper substrate formed by a metal and method of fabricating the same May 21, 2018 Issued
Array ( [id] => 17025760 [patent_doc_number] => 20210249632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => PACKAGING COVER PLATE, ORGANIC LIGHT-EMITTING DIODE DISPLAY AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 16/319576 [patent_app_country] => US [patent_app_date] => 2018-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2710 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16319576 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/319576
Packaging cover plate, organic light-emitting diode display and manufacturing method therefor May 10, 2018 Issued
Array ( [id] => 14277695 [patent_doc_number] => 20190136132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => COMPOSITION FOR ETCHING, METHOD OF ETCHING SILICON NITRIDE LAYER, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/973486 [patent_app_country] => US [patent_app_date] => 2018-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8745 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15973486 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/973486
COMPOSITION FOR ETCHING, METHOD OF ETCHING SILICON NITRIDE LAYER, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE May 6, 2018 Abandoned
Array ( [id] => 15092889 [patent_doc_number] => 20190341256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => SELECTIVE DEPOSITION OF ETCH-STOP LAYER FOR ENHANCED PATTERNING [patent_app_type] => utility [patent_app_number] => 15/972918 [patent_app_country] => US [patent_app_date] => 2018-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6742 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15972918 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/972918
Selective deposition of etch-stop layer for enhanced patterning May 6, 2018 Issued
Array ( [id] => 13405339 [patent_doc_number] => 20180254212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-06 [patent_title] => Interconnect Structure That Avoids Insulating Layer Damage and Methods of Making the Same [patent_app_type] => utility [patent_app_number] => 15/970596 [patent_app_country] => US [patent_app_date] => 2018-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15970596 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/970596
Interconnect Structure That Avoids Insulating Layer Damage and Methods of Making the Same May 2, 2018 Abandoned
Array ( [id] => 13543029 [patent_doc_number] => 20180323061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => Self-Aligned Triple Patterning Process Utilizing Organic Spacers [patent_app_type] => utility [patent_app_number] => 15/970168 [patent_app_country] => US [patent_app_date] => 2018-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3715 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15970168 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/970168
Self-Aligned Triple Patterning Process Utilizing Organic Spacers May 2, 2018 Abandoned
Array ( [id] => 13405595 [patent_doc_number] => 20180254340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-06 [patent_title] => TUNNEL FINFET WITH SELF-ALIGNED GATE [patent_app_type] => utility [patent_app_number] => 15/969226 [patent_app_country] => US [patent_app_date] => 2018-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4163 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15969226 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/969226
TUNNEL FINFET WITH SELF-ALIGNED GATE May 1, 2018 Abandoned
Array ( [id] => 15092881 [patent_doc_number] => 20190341252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => METHOD FOR PATTERNING A SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 15/968680 [patent_app_country] => US [patent_app_date] => 2018-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5734 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15968680 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/968680
Method for patterning a semiconductor structure Apr 30, 2018 Issued
Array ( [id] => 18967410 [patent_doc_number] => 11901190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Method of patterning [patent_app_type] => utility [patent_app_number] => 15/967100 [patent_app_country] => US [patent_app_date] => 2018-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 63 [patent_no_of_words] => 6626 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15967100 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/967100
Method of patterning Apr 29, 2018 Issued
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