Search

Sophia T. Nguyen

Examiner (ID: 13973)

Most Active Art Unit
2822
Art Unit(s)
2893, 2822, 2821
Total Applications
655
Issued Applications
250
Pending Applications
133
Abandoned Applications
284

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11637795 [patent_doc_number] => 09659779 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-23 [patent_title] => 'Method and structure for enabling high aspect ratio sacrificial gates' [patent_app_type] => utility [patent_app_number] => 14/524279 [patent_app_country] => US [patent_app_date] => 2014-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 7955 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14524279 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/524279
Method and structure for enabling high aspect ratio sacrificial gates Oct 26, 2014 Issued
Array ( [id] => 9898865 [patent_doc_number] => 20150054064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-26 [patent_title] => 'POWER SEMICONDUCTOR DEVICE WITH SUPER JUNCTION STRUCTURE AND INTERLACED, GRID-TYPE TRENCH NETWORK' [patent_app_type] => utility [patent_app_number] => 14/523938 [patent_app_country] => US [patent_app_date] => 2014-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 1899 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14523938 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/523938
POWER SEMICONDUCTOR DEVICE WITH SUPER JUNCTION STRUCTURE AND INTERLACED, GRID-TYPE TRENCH NETWORK Oct 25, 2014 Abandoned
Array ( [id] => 12005335 [patent_doc_number] => 20170309490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/513415 [patent_app_country] => US [patent_app_date] => 2014-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 13934 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15513415 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/513415
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Sep 23, 2014 Abandoned
Array ( [id] => 10965201 [patent_doc_number] => 20140368234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'MULTIPLE-QUBIT WAVE-ACTIVATED CONTROLLED GATE' [patent_app_type] => utility [patent_app_number] => 14/474492 [patent_app_country] => US [patent_app_date] => 2014-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4647 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14474492 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/474492
Multiple-qubit wave-activated controlled gate Sep 1, 2014 Issued
Array ( [id] => 10967621 [patent_doc_number] => 20140370654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/474370 [patent_app_country] => US [patent_app_date] => 2014-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 35029 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14474370 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/474370
Semiconductor device and manufacturing method thereof Sep 1, 2014 Issued
Array ( [id] => 10270342 [patent_doc_number] => 20150155339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-04 [patent_title] => 'METHOD OF MAKING ORGANIC LIGHT EMITTING DIODE ARRAY' [patent_app_type] => utility [patent_app_number] => 14/470942 [patent_app_country] => US [patent_app_date] => 2014-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5013 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14470942 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/470942
Method of making organic light emitting diode array Aug 27, 2014 Issued
Array ( [id] => 10285923 [patent_doc_number] => 20150170921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-18 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/464786 [patent_app_country] => US [patent_app_date] => 2014-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3326 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14464786 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/464786
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Aug 20, 2014 Abandoned
Array ( [id] => 10960932 [patent_doc_number] => 20140363961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-11 [patent_title] => 'THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/465420 [patent_app_country] => US [patent_app_date] => 2014-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 59 [patent_no_of_words] => 12386 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14465420 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/465420
Thin film transistor array panel and manufacturing method thereof Aug 20, 2014 Issued
Array ( [id] => 10233808 [patent_doc_number] => 20150118802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'DUAL CORNER TOP GATE MOLDING' [patent_app_type] => utility [patent_app_number] => 14/464719 [patent_app_country] => US [patent_app_date] => 2014-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2662 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14464719 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/464719
DUAL CORNER TOP GATE MOLDING Aug 20, 2014 Abandoned
Array ( [id] => 11918303 [patent_doc_number] => 09786494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-10 [patent_title] => 'Film formation method and film formation apparatus' [patent_app_type] => utility [patent_app_number] => 14/463735 [patent_app_country] => US [patent_app_date] => 2014-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 32 [patent_no_of_words] => 11126 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14463735 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/463735
Film formation method and film formation apparatus Aug 19, 2014 Issued
Array ( [id] => 9895617 [patent_doc_number] => 20150050816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-19 [patent_title] => 'METHOD OF ELECTROCHEMICALLY PREPARING SILICON FILM' [patent_app_type] => utility [patent_app_number] => 14/463584 [patent_app_country] => US [patent_app_date] => 2014-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8419 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14463584 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/463584
METHOD OF ELECTROCHEMICALLY PREPARING SILICON FILM Aug 18, 2014 Abandoned
Array ( [id] => 10954026 [patent_doc_number] => 20140357047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/458976 [patent_app_country] => US [patent_app_date] => 2014-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7888 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14458976 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/458976
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Aug 12, 2014 Abandoned
Array ( [id] => 10943487 [patent_doc_number] => 20140346508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-27 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/456330 [patent_app_country] => US [patent_app_date] => 2014-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 19255 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14456330 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/456330
Semiconductor device Aug 10, 2014 Issued
Array ( [id] => 10336552 [patent_doc_number] => 20150221557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'WIRING STRUCTURES AND METHODS OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/452665 [patent_app_country] => US [patent_app_date] => 2014-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4879 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14452665 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/452665
WIRING STRUCTURES AND METHODS OF FORMING THE SAME Aug 5, 2014 Abandoned
Array ( [id] => 10946416 [patent_doc_number] => 20140349438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-27 [patent_title] => 'DIAPHRAGM SHEET, AND METHOD FOR MANUFACTURING SOLAR CELL MODULE USING DIAPHRAGM SHEET' [patent_app_type] => utility [patent_app_number] => 14/452552 [patent_app_country] => US [patent_app_date] => 2014-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6506 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14452552 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/452552
DIAPHRAGM SHEET, AND METHOD FOR MANUFACTURING SOLAR CELL MODULE USING DIAPHRAGM SHEET Aug 5, 2014 Abandoned
Array ( [id] => 9901595 [patent_doc_number] => 20150056795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-26 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/445284 [patent_app_country] => US [patent_app_date] => 2014-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5820 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14445284 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/445284
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Jul 28, 2014 Abandoned
Array ( [id] => 10537739 [patent_doc_number] => 09263375 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'System, method and apparatus for leadless surface mounted semiconductor package' [patent_app_type] => utility [patent_app_number] => 14/341292 [patent_app_country] => US [patent_app_date] => 2014-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 25 [patent_no_of_words] => 6274 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14341292 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/341292
System, method and apparatus for leadless surface mounted semiconductor package Jul 24, 2014 Issued
Array ( [id] => 10929853 [patent_doc_number] => 20140332874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-13 [patent_title] => 'SEMICONDUCTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 14/338774 [patent_app_country] => US [patent_app_date] => 2014-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8041 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14338774 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/338774
SEMICONDUCTOR DEVICES Jul 22, 2014 Abandoned
Array ( [id] => 11180789 [patent_doc_number] => 09412785 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => 'Method of manufacturing semiconductor apparatus' [patent_app_type] => utility [patent_app_number] => 14/337488 [patent_app_country] => US [patent_app_date] => 2014-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3149 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14337488 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/337488
Method of manufacturing semiconductor apparatus Jul 21, 2014 Issued
Array ( [id] => 11811459 [patent_doc_number] => 09716032 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-25 [patent_title] => 'Via-free interconnect structure with self-aligned metal line interconnections' [patent_app_type] => utility [patent_app_number] => 14/331272 [patent_app_country] => US [patent_app_date] => 2014-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5730 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14331272 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/331272
Via-free interconnect structure with self-aligned metal line interconnections Jul 14, 2014 Issued
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