Sophia T. Nguyen

Array ( [id] => 9720395 [patent_doc_number] => 20140256097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-11 [patent_title] => 'METHODS FOR FORMING INTEGRATED CIRCUIT SYSTEMS EMPLOYING FLUORINE DOPING' [patent_app_type] => utility [patent_app_number] => 13/785557 [patent_app_country] => US [patent_app_date] => 2013-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4439 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13785557 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9582059 [patent_doc_number] => 08772062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Method for manufacturing light emitting diode package having LED die fixed by anisotropic conductive paste' [patent_app_type] => utility [patent_app_number] => 13/786354 [patent_app_country] => US [patent_app_date] => 2013-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2058 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13786354 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9094416 [patent_doc_number] => 20130273727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/783590 [patent_app_country] => US [patent_app_date] => 2013-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8013 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783590 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9634914 [patent_doc_number] => 20140213023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'METHOD FOR FABRICATING POWER SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/783399 [patent_app_country] => US [patent_app_date] => 2013-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2020 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783399 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9699064 [patent_doc_number] => 20140248749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-04 [patent_title] => 'STRESS MEMORIZATION TECHNIQUE' [patent_app_type] => utility [patent_app_number] => 13/783685 [patent_app_country] => US [patent_app_date] => 2013-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9405 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783685 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9699079 [patent_doc_number] => 20140248764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-04 [patent_title] => 'METHODS OF FORMING STRUCTURES ON AN INTEGRATED CIRCUIT PRODUCT' [patent_app_type] => utility [patent_app_number] => 13/783715 [patent_app_country] => US [patent_app_date] => 2013-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5017 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783715 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9699085 [patent_doc_number] => 20140248770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-04 [patent_title] => 'MICROWAVE-ASSISTED HEATING OF STRONG ACID SOLUTION TO REMOVE NICKEL PLATINUM/PLATINUM RESIDUES' [patent_app_type] => utility [patent_app_number] => 13/782309 [patent_app_country] => US [patent_app_date] => 2013-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2816 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13782309 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9864765 [patent_doc_number] => 20150044784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-12 [patent_title] => 'MANUFACTURING METHOD FOR ELECTROLUMINESCENT ELEMENT' [patent_app_type] => utility [patent_app_number] => 14/381891 [patent_app_country] => US [patent_app_date] => 2013-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8472 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14381891 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9468905 [patent_doc_number] => 08722535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-13 [patent_title] => 'Pattern forming method, mold and data processing method' [patent_app_type] => utility [patent_app_number] => 13/780034 [patent_app_country] => US [patent_app_date] => 2013-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 7212 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13780034 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9685970 [patent_doc_number] => 20140242735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-28 [patent_title] => 'Method for Aligning a Biochip' [patent_app_type] => utility [patent_app_number] => 13/780241 [patent_app_country] => US [patent_app_date] => 2013-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8552 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13780241 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11932624 [patent_doc_number] => 09799627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-24 [patent_title] => 'Semiconductor package structure and method' [patent_app_type] => utility [patent_app_number] => 13/745072 [patent_app_country] => US [patent_app_date] => 2013-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4825 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13745072 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10247867 [patent_doc_number] => 20150132863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-14 [patent_title] => 'PLASMA PROCESSING APPARATUS AND HEATER TEMPERATURE CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 14/368548 [patent_app_country] => US [patent_app_date] => 2013-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11823 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14368548 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9477329 [patent_doc_number] => 20140134792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'Solution-Processed Metal Selenide Semiconductor using Deposited Selenium Film' [patent_app_type] => utility [patent_app_number] => 13/719052 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5038 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13719052 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8841571 [patent_doc_number] => 20130137199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'SYSTEMS AND METHODS FOR MONITORING HETEROJUNCTION BIPOLAR TRANSISTOR PROCESSES' [patent_app_type] => utility [patent_app_number] => 13/675878 [patent_app_country] => US [patent_app_date] => 2012-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8641 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13675878 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9477380 [patent_doc_number] => 20140134844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'METHOD FOR PROCESSING A DIE' [patent_app_type] => utility [patent_app_number] => 13/674136 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5448 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674136 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9435495 [patent_doc_number] => 20140113402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-24 [patent_title] => 'High Efficiency Flexible Solar Cells For Consumer Electronics' [patent_app_type] => utility [patent_app_number] => 13/674215 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4369 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674215 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9477327 [patent_doc_number] => 20140134791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'Solution-Processed Metal-Selenide Semiconductor Using Selenium Nanoparticles' [patent_app_type] => utility [patent_app_number] => 13/674005 [patent_app_country] => US [patent_app_date] => 2012-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5542 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674005 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8866150 [patent_doc_number] => 20130149853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-13 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/673741 [patent_app_country] => US [patent_app_date] => 2012-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4169 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13673741 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9477375 [patent_doc_number] => 20140134838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'METHODS OF ANNEALING A CONDUCTIVE TRANSPARENT OXIDE FILM LAYER FOR USE IN A THIN FILM PHOTOVOLTAIC DEVICE' [patent_app_type] => utility [patent_app_number] => 13/673097 [patent_app_country] => US [patent_app_date] => 2012-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8397 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13673097 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9477373 [patent_doc_number] => 20140134836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'DIELECTRIC CAP LAYER FOR REPLACEMENT GATE WITH SELF-ALIGNED CONTACT' [patent_app_type] => utility [patent_app_number] => 13/672864 [patent_app_country] => US [patent_app_date] => 2012-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6060 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13672864 [rel_patent_id] =>[rel_patent_doc_number] =>)