Srirama T. Channavajjala

Array ( [id] => 20197421 [patent_doc_number] => 20250274131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => FREQUENCY DETECTOR AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 19/207800 [patent_app_country] => US [patent_app_date] => 2025-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19207800 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20054460 [patent_doc_number] => 20250192682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => Efficient Bootstrap Supply Generators for Multi-Level Power Converters [patent_app_type] => utility [patent_app_number] => 19/060481 [patent_app_country] => US [patent_app_date] => 2025-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11313 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19060481 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20045659 [patent_doc_number] => 20250183881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => METHOD OF AND APPARATUS FOR CONTROLLING CLOCK SIGNAL [patent_app_type] => utility [patent_app_number] => 19/047194 [patent_app_country] => US [patent_app_date] => 2025-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19047194 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19848776 [patent_doc_number] => 20250094127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => COMPUTING DEVICE FOR PERFORMING DIGITAL PULSE-BASED CROSSBAR OPERATION AND METHOD OF OPERATING THE COMPUTING DEVICE [patent_app_type] => utility [patent_app_number] => 18/969509 [patent_app_country] => US [patent_app_date] => 2024-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18969509 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20019279 [patent_doc_number] => 20250157501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => SENSE AMPLIFIER FOR COUPLING EFFECT REDUCTION [patent_app_type] => utility [patent_app_number] => 18/968522 [patent_app_country] => US [patent_app_date] => 2024-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8330 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18968522 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20682816 [patent_doc_number] => 20260121645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-30 [patent_title] => CURRENT REFERENCE GENERATOR AND ASSOCIATED METHOD [patent_app_type] => utility [patent_app_number] => 18/949007 [patent_app_country] => US [patent_app_date] => 2024-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2250 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18949007 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20543415 [patent_doc_number] => 20260050306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-19 [patent_title] => POWER TIMING CONTROL DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 18/931674 [patent_app_country] => US [patent_app_date] => 2024-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4828 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18931674 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19713413 [patent_doc_number] => 20250023555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => INVERTER AND BOOTSTRAP INVERTER WITH IMPROVED OUTPUT CHARACTERISTICS [patent_app_type] => utility [patent_app_number] => 18/901088 [patent_app_country] => US [patent_app_date] => 2024-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2668 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18901088 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20630899 [patent_doc_number] => 20260095188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-02 [patent_title] => ELECTRONIC CONTROL CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/901365 [patent_app_country] => US [patent_app_date] => 2024-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18901365 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20630867 [patent_doc_number] => 20260095156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-02 [patent_title] => FLIP-FLOPS WITH MULTIPLE DATA RETENTION PATHS [patent_app_type] => utility [patent_app_number] => 18/898813 [patent_app_country] => US [patent_app_date] => 2024-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18898813 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19987575 [patent_doc_number] => 20250125797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => HIGH-FREQUENCY SWITCH CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/898850 [patent_app_country] => US [patent_app_date] => 2024-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18898850 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19662839 [patent_doc_number] => 20240429904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => ASYNCRONOUS RESETTING INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 18/826526 [patent_app_country] => US [patent_app_date] => 2024-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7742 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18826526 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20124985 [patent_doc_number] => 20250240016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => SEMICONDUCTOR APPARATUS [patent_app_type] => utility [patent_app_number] => 18/822068 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18822068 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20572975 [patent_doc_number] => 20260066904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-05 [patent_title] => RESETTABLE LEVEL SHIFTING LATCH [patent_app_type] => utility [patent_app_number] => 18/821349 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2484 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18821349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20483084 [patent_doc_number] => 12531561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Phase-locked loop control circuit, phase-locked loop circuit and control method thereof [patent_app_type] => utility [patent_app_number] => 18/817238 [patent_app_country] => US [patent_app_date] => 2024-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1116 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18817238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19605673 [patent_doc_number] => 20240396553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => LEVEL SHIFTING CIRCUIT MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 18/790551 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16425 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18790551 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19590739 [patent_doc_number] => 20240388296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => Semiconductor Device Including a Level Shifter and Method of Mitigating a Delay Between Input and Output Signals [patent_app_type] => utility [patent_app_number] => 18/786702 [patent_app_country] => US [patent_app_date] => 2024-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7042 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18786702 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19750183 [patent_doc_number] => 20250038748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => LEVEL SHIFTER ENABLE [patent_app_type] => utility [patent_app_number] => 18/773324 [patent_app_country] => US [patent_app_date] => 2024-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5206 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18773324 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20204547 [patent_doc_number] => 12407337 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Flip-flop circuit and method [patent_app_type] => utility [patent_app_number] => 18/768843 [patent_app_country] => US [patent_app_date] => 2024-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 7487 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18768843 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19547305 [patent_doc_number] => 20240364341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => Semiconductor Device Including a Level Shifter and Method of Mitigating a Delay Between Input and Output Signals [patent_app_type] => utility [patent_app_number] => 18/767158 [patent_app_country] => US [patent_app_date] => 2024-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7044 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18767158 [rel_patent_id] =>[rel_patent_doc_number] =>)