Search

Srirama T. Channavajjala

Examiner (ID: 8544)

Most Active Art Unit
2157
Art Unit(s)
2157, 2154, 2164, 2771, 2177, 2158, 2777, 2166, 2161, 2776
Total Applications
1249
Issued Applications
847
Pending Applications
104
Abandoned Applications
304

Applications

Application numberTitle of the applicationFiling DateStatus
17/179229 SKEW-CORRECTING CLOCK BUFFER Feb 17, 2021 Abandoned
Array ( [id] => 17819218 [patent_doc_number] => 11424846 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-23 [patent_title] => Recursive serializers and deserializers [patent_app_type] => utility [patent_app_number] => 17/169259 [patent_app_country] => US [patent_app_date] => 2021-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7217 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17169259 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/169259
Recursive serializers and deserializers Feb 4, 2021 Issued
Array ( [id] => 17033452 [patent_doc_number] => 11095275 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-17 [patent_title] => Loadable true-single-phase-clocking flop [patent_app_type] => utility [patent_app_number] => 17/164722 [patent_app_country] => US [patent_app_date] => 2021-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7262 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17164722 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/164722
Loadable true-single-phase-clocking flop Jan 31, 2021 Issued
Array ( [id] => 17439629 [patent_doc_number] => 11264974 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => Processing circuit using delay element coupled between control terminal and connection terminal of input transistor for hold time violation immunity [patent_app_type] => utility [patent_app_number] => 17/151672 [patent_app_country] => US [patent_app_date] => 2021-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 4011 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17151672 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/151672
Processing circuit using delay element coupled between control terminal and connection terminal of input transistor for hold time violation immunity Jan 18, 2021 Issued
Array ( [id] => 18192807 [patent_doc_number] => 20230046326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => A FRACTIONAL-N FREQUENCY SYNTHESIZER BASED ON A CHARGE-SHARING LOCKING TECHNIQUE [patent_app_type] => utility [patent_app_number] => 17/792636 [patent_app_country] => US [patent_app_date] => 2021-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6318 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17792636 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/792636
Fractional-N frequency synthesizer based on a charge-sharing locking technique Jan 13, 2021 Issued
Array ( [id] => 17366464 [patent_doc_number] => 11233500 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-01-25 [patent_title] => Clock distribution network, a semiconductor apparatus and a semiconductor system using the same [patent_app_type] => utility [patent_app_number] => 17/146988 [patent_app_country] => US [patent_app_date] => 2021-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 9665 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17146988 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/146988
Clock distribution network, a semiconductor apparatus and a semiconductor system using the same Jan 11, 2021 Issued
Array ( [id] => 17544743 [patent_doc_number] => 11309884 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-04-19 [patent_title] => Switching circuits having drain connected ferrite beads [patent_app_type] => utility [patent_app_number] => 17/138101 [patent_app_country] => US [patent_app_date] => 2020-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6772 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17138101 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/138101
Switching circuits having drain connected ferrite beads Dec 29, 2020 Issued
Array ( [id] => 18275559 [patent_doc_number] => 11614499 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-28 [patent_title] => Methods and apparatus to improve detection of capacitors implemented for regulators [patent_app_type] => utility [patent_app_number] => 17/133378 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 20026 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17133378 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/133378
Methods and apparatus to improve detection of capacitors implemented for regulators Dec 22, 2020 Issued
Array ( [id] => 19137353 [patent_doc_number] => 11972320 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-04-30 [patent_title] => Cryogenic power supply [patent_app_type] => utility [patent_app_number] => 17/112794 [patent_app_country] => US [patent_app_date] => 2020-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 9358 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17112794 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/112794
Cryogenic power supply Dec 3, 2020 Issued
Array ( [id] => 20161172 [patent_doc_number] => 12387805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Semiconductor device, display device, and electronic device [patent_app_type] => utility [patent_app_number] => 17/779219 [patent_app_country] => US [patent_app_date] => 2020-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 71 [patent_no_of_words] => 30286 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17779219 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/779219
Semiconductor device, display device, and electronic device Dec 1, 2020 Issued
Array ( [id] => 17019045 [patent_doc_number] => 11088698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Phase-locked loop circuit [patent_app_type] => utility [patent_app_number] => 17/107382 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 11941 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17107382 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/107382
Phase-locked loop circuit Nov 29, 2020 Issued
Array ( [id] => 18098450 [patent_doc_number] => 20220416791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => LEVEL SHIFTER CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/756676 [patent_app_country] => US [patent_app_date] => 2020-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9093 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 388 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17756676 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/756676
Level shifter circuit Nov 12, 2020 Issued
Array ( [id] => 17003222 [patent_doc_number] => 11082053 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-03 [patent_title] => Phase locked loop-based power supply circuit and method, and chip [patent_app_type] => utility [patent_app_number] => 17/090404 [patent_app_country] => US [patent_app_date] => 2020-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 7741 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17090404 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/090404
Phase locked loop-based power supply circuit and method, and chip Nov 4, 2020 Issued
Array ( [id] => 17033468 [patent_doc_number] => 11095291 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Time measurement circuit, system having a PWM signal generator circuit and a time measurement circuit, and corresponding integrated circuit [patent_app_type] => utility [patent_app_number] => 17/078945 [patent_app_country] => US [patent_app_date] => 2020-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 28 [patent_no_of_words] => 11240 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17078945 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/078945
Time measurement circuit, system having a PWM signal generator circuit and a time measurement circuit, and corresponding integrated circuit Oct 22, 2020 Issued
Array ( [id] => 17381798 [patent_doc_number] => 11239833 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Dither generation for radio frequency sampling digital-to-analog converters [patent_app_type] => utility [patent_app_number] => 17/071302 [patent_app_country] => US [patent_app_date] => 2020-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5001 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17071302 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/071302
Dither generation for radio frequency sampling digital-to-analog converters Oct 14, 2020 Issued
Array ( [id] => 17284562 [patent_doc_number] => 11201610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Selectable delay buffers and logic cells for dynamic voltage scaling in ultra low voltage designs [patent_app_type] => utility [patent_app_number] => 17/065660 [patent_app_country] => US [patent_app_date] => 2020-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 6091 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17065660 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/065660
Selectable delay buffers and logic cells for dynamic voltage scaling in ultra low voltage designs Oct 7, 2020 Issued
Array ( [id] => 17498770 [patent_doc_number] => 11287471 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-29 [patent_title] => Electronic circuit for online monitoring a clock signal [patent_app_type] => utility [patent_app_number] => 17/037752 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4075 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17037752 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/037752
Electronic circuit for online monitoring a clock signal Sep 29, 2020 Issued
Array ( [id] => 16881759 [patent_doc_number] => 11031923 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-08 [patent_title] => Interface device and interface method for 3D semiconductor device [patent_app_type] => utility [patent_app_number] => 17/037739 [patent_app_country] => US [patent_app_date] => 2020-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 12124 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17037739 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/037739
Interface device and interface method for 3D semiconductor device Sep 29, 2020 Issued
Array ( [id] => 17033451 [patent_doc_number] => 11095274 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-17 [patent_title] => Pre-discharged bypass flip-flop circuit [patent_app_type] => utility [patent_app_number] => 17/032530 [patent_app_country] => US [patent_app_date] => 2020-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4919 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17032530 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/032530
Pre-discharged bypass flip-flop circuit Sep 24, 2020 Issued
Array ( [id] => 17607778 [patent_doc_number] => 11336272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Low power single retention pin flip-flop with balloon latch [patent_app_type] => utility [patent_app_number] => 17/028790 [patent_app_country] => US [patent_app_date] => 2020-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6621 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17028790 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/028790
Low power single retention pin flip-flop with balloon latch Sep 21, 2020 Issued
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