Search

Srirama T. Channavajjala

Examiner (ID: 8544)

Most Active Art Unit
2157
Art Unit(s)
2157, 2154, 2164, 2771, 2177, 2158, 2777, 2166, 2161, 2776
Total Applications
1249
Issued Applications
847
Pending Applications
104
Abandoned Applications
304

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17900325 [patent_doc_number] => 20220309987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => CIRCUIT DRIVING SYSTEM, DRIVER CHIP, AND DISPLAYDEVICE [patent_app_type] => utility [patent_app_number] => 16/758407 [patent_app_country] => US [patent_app_date] => 2020-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4594 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16758407 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/758407
Circuit driving system, driver chip, and display device Apr 20, 2020 Issued
Array ( [id] => 17918518 [patent_doc_number] => 20220320914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => STORAGE CABINET FOR WEARABLE DEVICE, AND USAGE METHOD FOR STORAGE CABINET [patent_app_type] => utility [patent_app_number] => 17/606234 [patent_app_country] => US [patent_app_date] => 2020-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5831 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17606234 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/606234
STORAGE CABINET FOR WEARABLE DEVICE, AND USAGE METHOD FOR STORAGE CABINET Apr 12, 2020 Abandoned
Array ( [id] => 17145968 [patent_doc_number] => 20210313981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => CLOSED LOOP SWITCH CONTROL SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 16/841132 [patent_app_country] => US [patent_app_date] => 2020-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6942 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16841132 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/841132
Closed loop switch control system and method Apr 5, 2020 Issued
Array ( [id] => 18131829 [patent_doc_number] => 11558047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Switched-mode power supply controller and method for operating a switched-mode power supply controller [patent_app_type] => utility [patent_app_number] => 16/841533 [patent_app_country] => US [patent_app_date] => 2020-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5392 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16841533 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/841533
Switched-mode power supply controller and method for operating a switched-mode power supply controller Apr 5, 2020 Issued
Array ( [id] => 16678400 [patent_doc_number] => 20210067166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => MULTIPHASE INJECTION LOCKED SUB-SAMPLING PHASE LOCKED LOOP (PLL) CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/839124 [patent_app_country] => US [patent_app_date] => 2020-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7303 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16839124 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/839124
MULTIPHASE INJECTION LOCKED SUB-SAMPLING PHASE LOCKED LOOP (PLL) CIRCUIT Apr 2, 2020 Abandoned
Array ( [id] => 16708312 [patent_doc_number] => 10958259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Pulse width modulation output stage with dead time control [patent_app_type] => utility [patent_app_number] => 16/837634 [patent_app_country] => US [patent_app_date] => 2020-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 4919 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16837634 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/837634
Pulse width modulation output stage with dead time control Mar 31, 2020 Issued
Array ( [id] => 19138370 [patent_doc_number] => 11973347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Storage battery system and method for suppressing fluctuation in frequency of AC power system [patent_app_type] => utility [patent_app_number] => 17/795542 [patent_app_country] => US [patent_app_date] => 2020-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7264 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17795542 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/795542
Storage battery system and method for suppressing fluctuation in frequency of AC power system Mar 29, 2020 Issued
Array ( [id] => 17574844 [patent_doc_number] => 11323123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Circuit to correct phase interpolator rollover integral non-linearity errors [patent_app_type] => utility [patent_app_number] => 16/827691 [patent_app_country] => US [patent_app_date] => 2020-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7455 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16827691 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/827691
Circuit to correct phase interpolator rollover integral non-linearity errors Mar 22, 2020 Issued
Array ( [id] => 16409076 [patent_doc_number] => 10817631 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-27 [patent_title] => Low-dropout regulator and charge pump modeling using frequency-domain fitting methods [patent_app_type] => utility [patent_app_number] => 16/826416 [patent_app_country] => US [patent_app_date] => 2020-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 8614 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16826416 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/826416
Low-dropout regulator and charge pump modeling using frequency-domain fitting methods Mar 22, 2020 Issued
Array ( [id] => 16746107 [patent_doc_number] => 10971104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Shift register and method for driving the same, gate driving circuit, and display device [patent_app_type] => utility [patent_app_number] => 16/825842 [patent_app_country] => US [patent_app_date] => 2020-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10885 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16825842 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/825842
Shift register and method for driving the same, gate driving circuit, and display device Mar 19, 2020 Issued
Array ( [id] => 19063673 [patent_doc_number] => 11942936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Energy-efficient SFQ logic biasing technique [patent_app_type] => utility [patent_app_number] => 17/438280 [patent_app_country] => US [patent_app_date] => 2020-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8689 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17438280 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/438280
Energy-efficient SFQ logic biasing technique Mar 11, 2020 Issued
Array ( [id] => 16373140 [patent_doc_number] => 10804914 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Adaptive non-linearity identification and compensation using orthogonal functions in a mixed signal circuit [patent_app_type] => utility [patent_app_number] => 16/817045 [patent_app_country] => US [patent_app_date] => 2020-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 9825 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16817045 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/817045
Adaptive non-linearity identification and compensation using orthogonal functions in a mixed signal circuit Mar 11, 2020 Issued
Array ( [id] => 16746106 [patent_doc_number] => 10971103 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Driver circuit, display device, and electronic device [patent_app_type] => utility [patent_app_number] => 16/812604 [patent_app_country] => US [patent_app_date] => 2020-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 55 [patent_no_of_words] => 35351 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 453 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16812604 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/812604
Driver circuit, display device, and electronic device Mar 8, 2020 Issued
Array ( [id] => 16803116 [patent_doc_number] => 10998067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Shift register, driving method thereof, gate driving circuit and display panel [patent_app_type] => utility [patent_app_number] => 16/811766 [patent_app_country] => US [patent_app_date] => 2020-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 14007 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16811766 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/811766
Shift register, driving method thereof, gate driving circuit and display panel Mar 5, 2020 Issued
Array ( [id] => 16575318 [patent_doc_number] => 10897249 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-01-19 [patent_title] => Switching circuits having drain connected ferrite beads [patent_app_type] => utility [patent_app_number] => 16/810735 [patent_app_country] => US [patent_app_date] => 2020-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6693 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16810735 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/810735
Switching circuits having drain connected ferrite beads Mar 4, 2020 Issued
Array ( [id] => 17056552 [patent_doc_number] => 20210265986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-26 [patent_title] => LOGIC AND FLIP-FLOP CIRCUIT TIMING MARGINS CONTROLLED BASED ON SCAN-PATTERN TRANSITION PROCESSING [patent_app_type] => utility [patent_app_number] => 16/799053 [patent_app_country] => US [patent_app_date] => 2020-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5593 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16799053 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/799053
Logic and flip-flop circuit timing margins controlled based on scan-pattern transition processing Feb 23, 2020 Issued
Array ( [id] => 17646001 [patent_doc_number] => 20220173740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => GENERATOR AND METHOD FOR GENERATING A CONTROLLED FREQUENCY [patent_app_type] => utility [patent_app_number] => 17/434703 [patent_app_country] => US [patent_app_date] => 2020-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16485 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17434703 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/434703
Generator and method for generating a controlled frequency Feb 23, 2020 Issued
Array ( [id] => 17516668 [patent_doc_number] => 11295828 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => Multi-chip programming for phased array [patent_app_type] => utility [patent_app_number] => 16/789974 [patent_app_country] => US [patent_app_date] => 2020-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5478 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16789974 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/789974
Multi-chip programming for phased array Feb 12, 2020 Issued
Array ( [id] => 16370775 [patent_doc_number] => 10802526 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-13 [patent_title] => Input circuit [patent_app_type] => utility [patent_app_number] => 16/788574 [patent_app_country] => US [patent_app_date] => 2020-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9090 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16788574 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/788574
Input circuit Feb 11, 2020 Issued
Array ( [id] => 16239659 [patent_doc_number] => 20200256893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => SYSTEMS AND METHODS FOR SYNCHRONIZING MULTIPLE TEST AND MEASUREMENT INSTRUMENTS [patent_app_type] => utility [patent_app_number] => 16/788176 [patent_app_country] => US [patent_app_date] => 2020-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5813 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16788176 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/788176
Systems and methods for synchronizing multiple test and measurement instruments Feb 10, 2020 Issued
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