Srirama T. Channavajjala

Array ( [id] => 16654237 [patent_doc_number] => 10931436 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-23 [patent_title] => Detector circuit and operation method [patent_app_type] => utility [patent_app_number] => 16/785782 [patent_app_country] => US [patent_app_date] => 2020-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4133 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16785782 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16255277 [patent_doc_number] => 20200264651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-20 [patent_title] => SEMICONDUCTOR DEVICE, SIGNAL PROCESSING DEVICE, AND CONTROL METHOD OF SIGNAL PROCESSING DEVICE [patent_app_type] => utility [patent_app_number] => 16/783599 [patent_app_country] => US [patent_app_date] => 2020-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9796 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16783599 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16739762 [patent_doc_number] => 10965438 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-30 [patent_title] => Signal receiving circuit, memory storage device and signal receiving method [patent_app_type] => utility [patent_app_number] => 16/779666 [patent_app_country] => US [patent_app_date] => 2020-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6357 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16779666 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16149591 [patent_doc_number] => 10707883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => Adaptive non-linearity identification and compensation using orthogonal functions in a mixed signal circuit [patent_app_type] => utility [patent_app_number] => 16/776222 [patent_app_country] => US [patent_app_date] => 2020-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 9804 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16776222 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17181894 [patent_doc_number] => 11159148 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-10-26 [patent_title] => Hybrid FIFO buffer [patent_app_type] => utility [patent_app_number] => 16/773522 [patent_app_country] => US [patent_app_date] => 2020-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6047 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16773522 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16789862 [patent_doc_number] => 10992305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Initialization method for precision phase adder [patent_app_type] => utility [patent_app_number] => 16/747757 [patent_app_country] => US [patent_app_date] => 2020-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 46 [patent_no_of_words] => 16327 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16747757 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16433581 [patent_doc_number] => 10833684 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-10 [patent_title] => Method and circuits for reducing noise in phase-locked loops [patent_app_type] => utility [patent_app_number] => 16/743702 [patent_app_country] => US [patent_app_date] => 2020-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4374 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16743702 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17325521 [patent_doc_number] => 11216535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-04 [patent_title] => Probability mass redistributor device [patent_app_type] => utility [patent_app_number] => 16/742835 [patent_app_country] => US [patent_app_date] => 2020-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3558 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16742835 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19030420 [patent_doc_number] => 11929792 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Wireless power transfer using dynamic beamforming [patent_app_type] => utility [patent_app_number] => 17/791291 [patent_app_country] => US [patent_app_date] => 2020-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 11944 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17791291 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16356220 [patent_doc_number] => 10796737 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-06 [patent_title] => Semiconductor apparatus capable of synchronizing command signal and clock signal, and operation method thereof [patent_app_type] => utility [patent_app_number] => 16/725174 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 10602 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725174 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15719321 [patent_doc_number] => 20200106428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => SELF-CLOCKING SAMPLER WITH REDUCED METASTABILITY [patent_app_type] => utility [patent_app_number] => 16/700839 [patent_app_country] => US [patent_app_date] => 2019-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6630 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16700839 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18782502 [patent_doc_number] => 11824273 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Minimizing impedance variation during passive phase shifting [patent_app_type] => utility [patent_app_number] => 16/683472 [patent_app_country] => US [patent_app_date] => 2019-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 31 [patent_no_of_words] => 13619 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 376 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16683472 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16654067 [patent_doc_number] => 10931265 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-23 [patent_title] => PWM signal generation and error calibration circuit [patent_app_type] => utility [patent_app_number] => 16/677543 [patent_app_country] => US [patent_app_date] => 2019-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5846 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 690 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16677543 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16036339 [patent_doc_number] => 10680606 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-06-09 [patent_title] => Timing control device and method for high frequency signal system [patent_app_type] => utility [patent_app_number] => 16/675311 [patent_app_country] => US [patent_app_date] => 2019-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8286 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 1114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16675311 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16480304 [patent_doc_number] => 10855265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Comparison circuit [patent_app_type] => utility [patent_app_number] => 16/672559 [patent_app_country] => US [patent_app_date] => 2019-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 29 [patent_no_of_words] => 9299 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16672559 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16250148 [patent_doc_number] => 10749531 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-18 [patent_title] => Multi-modulus frequency divider circuit [patent_app_type] => utility [patent_app_number] => 16/673835 [patent_app_country] => US [patent_app_date] => 2019-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9934 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16673835 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16068959 [patent_doc_number] => 10693447 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-06-23 [patent_title] => Comparator circuit [patent_app_type] => utility [patent_app_number] => 16/671137 [patent_app_country] => US [patent_app_date] => 2019-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5517 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 607 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16671137 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16049081 [patent_doc_number] => 10686431 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-06-16 [patent_title] => High-sensitivity clocked comparator and method thereof [patent_app_type] => utility [patent_app_number] => 16/656801 [patent_app_country] => US [patent_app_date] => 2019-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4760 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16656801 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16202646 [patent_doc_number] => 10727834 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Level shifter in half bridge GaN driver applications [patent_app_type] => utility [patent_app_number] => 16/654209 [patent_app_country] => US [patent_app_date] => 2019-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4888 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16654209 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16173569 [patent_doc_number] => 10715155 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-14 [patent_title] => Apparatus and methods for digital phase locked loop with analog proportional control function [patent_app_type] => utility [patent_app_number] => 16/600808 [patent_app_country] => US [patent_app_date] => 2019-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6639 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16600808 [rel_patent_id] =>[rel_patent_doc_number] =>)