Search

Srirama T. Channavajjala

Examiner (ID: 8544)

Most Active Art Unit
2157
Art Unit(s)
2157, 2154, 2164, 2771, 2177, 2158, 2777, 2166, 2161, 2776
Total Applications
1249
Issued Applications
847
Pending Applications
104
Abandoned Applications
304

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15457453 [patent_doc_number] => 20200041551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => FREQUENCY SYNTHESIZER OUTPUT CYCLE COUNTER INCLUDING RING ENCODER [patent_app_type] => utility [patent_app_number] => 16/597612 [patent_app_country] => US [patent_app_date] => 2019-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4054 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16597612 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/597612
Frequency synthesizer output cycle counter including ring encoder Oct 8, 2019 Issued
Array ( [id] => 16410754 [patent_doc_number] => 10819325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-27 [patent_title] => Selectable delay buffers and logic cells for dynamic voltage scaling in ultra low voltage designs [patent_app_type] => utility [patent_app_number] => 16/590849 [patent_app_country] => US [patent_app_date] => 2019-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 6076 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16590849 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/590849
Selectable delay buffers and logic cells for dynamic voltage scaling in ultra low voltage designs Oct 1, 2019 Issued
Array ( [id] => 17166829 [patent_doc_number] => 11152944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Termination calibration scheme using a current mirror [patent_app_type] => utility [patent_app_number] => 16/570334 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7509 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16570334 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/570334
Termination calibration scheme using a current mirror Sep 12, 2019 Issued
Array ( [id] => 16666763 [patent_doc_number] => 10936006 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-02 [patent_title] => Clock distribution network and method for dynamically changing a clock frequency in a digital processing system [patent_app_type] => utility [patent_app_number] => 16/557290 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8552 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557290 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/557290
Clock distribution network and method for dynamically changing a clock frequency in a digital processing system Aug 29, 2019 Issued
Array ( [id] => 16801767 [patent_doc_number] => 10996709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Low power clock gate circuit [patent_app_type] => utility [patent_app_number] => 16/557860 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 8602 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557860 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/557860
Low power clock gate circuit Aug 29, 2019 Issued
Array ( [id] => 17218428 [patent_doc_number] => 20210351766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => DATA HOLDING CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/283653 [patent_app_country] => US [patent_app_date] => 2019-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9544 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 358 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17283653 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/283653
Data holding circuit Aug 21, 2019 Issued
Array ( [id] => 15502935 [patent_doc_number] => 20200051656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => SHIFT REGISTER UNIT, SHIFT REGISTER CIRCUIT AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/533110 [patent_app_country] => US [patent_app_date] => 2019-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21599 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 421 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16533110 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/533110
Shift register unit, shift register circuit and display device Aug 5, 2019 Issued
Array ( [id] => 15442493 [patent_doc_number] => 20200035430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => ELECTRONIC RELAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/521646 [patent_app_country] => US [patent_app_date] => 2019-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4207 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16521646 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/521646
Electronic relay device Jul 24, 2019 Issued
Array ( [id] => 15839923 [patent_doc_number] => 20200135244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => DRIVING CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/512776 [patent_app_country] => US [patent_app_date] => 2019-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4812 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16512776 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/512776
Driving circuit Jul 15, 2019 Issued
Array ( [id] => 15369291 [patent_doc_number] => 20200020410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => SHIFT REGISTER CIRCUIT, GATE DRIVING CIRCUIT, DISPLAY APPARATUS AND METHOD FOR DRIVING THE SAME [patent_app_type] => utility [patent_app_number] => 16/511665 [patent_app_country] => US [patent_app_date] => 2019-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16511665 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/511665
Shift register circuit, gate driving circuit, display apparatus and method for driving the same Jul 14, 2019 Issued
Array ( [id] => 17606297 [patent_doc_number] => 11334787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Neuron circuit [patent_app_type] => utility [patent_app_number] => 16/509399 [patent_app_country] => US [patent_app_date] => 2019-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 5165 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16509399 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/509399
Neuron circuit Jul 10, 2019 Issued
Array ( [id] => 17107253 [patent_doc_number] => 11127478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Shift register unit and driving method thereof, gate driving circuit, and display device [patent_app_type] => utility [patent_app_number] => 16/633277 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 11069 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16633277 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/633277
Shift register unit and driving method thereof, gate driving circuit, and display device Jul 9, 2019 Issued
Array ( [id] => 16392883 [patent_doc_number] => 20200333824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => INTEGRATED CLOCK GATER LATCH STRUCTURES WITH ADJUSTABLE OUTPUT RESET [patent_app_type] => utility [patent_app_number] => 16/504215 [patent_app_country] => US [patent_app_date] => 2019-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16504215 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/504215
Integrated clock gater latch structures with adjustable output reset Jul 4, 2019 Issued
Array ( [id] => 15371057 [patent_doc_number] => 20200021293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => SIGNAL TRANSMISSION DEVICE AND DRIVE DEVICE [patent_app_type] => utility [patent_app_number] => 16/460180 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10031 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 415 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460180 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/460180
Signal transmission device and drive device Jul 1, 2019 Issued
Array ( [id] => 18032668 [patent_doc_number] => 11515873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => Semiconductor device and electronic device [patent_app_type] => utility [patent_app_number] => 16/449595 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 89 [patent_no_of_words] => 54375 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449595 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449595
Semiconductor device and electronic device Jun 23, 2019 Issued
Array ( [id] => 17224501 [patent_doc_number] => 11177011 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-16 [patent_title] => Bit data shifter [patent_app_type] => utility [patent_app_number] => 16/449349 [patent_app_country] => US [patent_app_date] => 2019-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2352 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449349 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449349
Bit data shifter Jun 21, 2019 Issued
Array ( [id] => 15299553 [patent_doc_number] => 20190392912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => QUANTUM SHIFT REGISTER BASED ANCILLARY QUANTUM INTERACTION GATES [patent_app_type] => utility [patent_app_number] => 16/446313 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29643 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446313 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446313
Quantum shift register based ancillary quantum interaction gates Jun 18, 2019 Issued
Array ( [id] => 16476051 [patent_doc_number] => 10850978 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Quantum shift register structures [patent_app_type] => utility [patent_app_number] => 16/446294 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 66 [patent_figures_cnt] => 158 [patent_no_of_words] => 29422 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446294 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446294
Quantum shift register structures Jun 18, 2019 Issued
Array ( [id] => 16487460 [patent_doc_number] => 20200381069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => STRIPE BASED SELF-GATING FOR RETIMING PIPELINES [patent_app_type] => utility [patent_app_number] => 16/445945 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4502 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16445945 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/445945
Stripe based self-gating for retiming pipelines Jun 18, 2019 Issued
Array ( [id] => 15299555 [patent_doc_number] => 20190392913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => QUANTUM SHIFT REGISTER INCORPORATING BIFURCATION [patent_app_type] => utility [patent_app_number] => 16/446325 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29499 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446325 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446325
Quantum shift register incorporating bifurcation Jun 18, 2019 Issued
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