Srirama T. Channavajjala

Array ( [id] => 15923611 [patent_doc_number] => 10659058 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-05-19 [patent_title] => Systems and methods involving lock loop circuits, distributed duty cycle correction loop circuitry [patent_app_type] => utility [patent_app_number] => 15/193699 [patent_app_country] => US [patent_app_date] => 2016-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 5888 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15193699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12188405 [patent_doc_number] => 20180047341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'SHIFT REGISTER UNIT, GATE DRIVE CIRCUIT AND DISPLAY PANEL' [patent_app_type] => utility [patent_app_number] => 15/531377 [patent_app_country] => US [patent_app_date] => 2016-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7531 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15531377 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11111548 [patent_doc_number] => 20160308518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'SIGNAL POTENTIAL CONVERTER' [patent_app_type] => utility [patent_app_number] => 15/191455 [patent_app_country] => US [patent_app_date] => 2016-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4043 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15191455 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11097403 [patent_doc_number] => 20160294372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'SIGNAL POTENTIAL CONVERTER' [patent_app_type] => utility [patent_app_number] => 15/185781 [patent_app_country] => US [patent_app_date] => 2016-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6424 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15185781 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11616247 [patent_doc_number] => 09654118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-16 [patent_title] => 'Phase-rotating phase locked loop and method of controlling operation thereof' [patent_app_type] => utility [patent_app_number] => 15/179202 [patent_app_country] => US [patent_app_date] => 2016-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 21 [patent_no_of_words] => 8424 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15179202 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12223148 [patent_doc_number] => 20180061508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'SHIFT REGISTER UNIT AND METHOD FOR DRIVING THE SAME, CORRESPONDING GATE DRIVING CIRCUIT AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/526315 [patent_app_country] => US [patent_app_date] => 2016-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4874 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15526315 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13111315 [patent_doc_number] => 10074315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-11 [patent_title] => Shift register unit, driving method, gate driving circuit and display device [patent_app_type] => utility [patent_app_number] => 15/539124 [patent_app_country] => US [patent_app_date] => 2016-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7538 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 595 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15539124 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11125530 [patent_doc_number] => 20160322504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-03 [patent_title] => 'SEMICONDUCTOR DEVICE, DRIVER CIRCUIT, AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/147168 [patent_app_country] => US [patent_app_date] => 2016-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 39029 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15147168 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11398552 [patent_doc_number] => 20170019090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-19 [patent_title] => 'LEVEL SHIFT CIRCUIT' [patent_app_type] => utility [patent_app_number] => 15/140841 [patent_app_country] => US [patent_app_date] => 2016-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5296 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15140841 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14037219 [patent_doc_number] => 10230373 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-12 [patent_title] => Clock gating circuit [patent_app_type] => utility [patent_app_number] => 15/139949 [patent_app_country] => US [patent_app_date] => 2016-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 8746 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15139949 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13952057 [patent_doc_number] => 10211815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => Systems and methods for supplying different voltage levels with shared current [patent_app_type] => utility [patent_app_number] => 15/135622 [patent_app_country] => US [patent_app_date] => 2016-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5227 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15135622 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14557483 [patent_doc_number] => 10347209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Shift register [patent_app_type] => utility [patent_app_number] => 15/570296 [patent_app_country] => US [patent_app_date] => 2016-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 29 [patent_no_of_words] => 17759 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15570296 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12737992 [patent_doc_number] => 20180137831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => SHIFT REGISTER [patent_app_type] => utility [patent_app_number] => 15/570291 [patent_app_country] => US [patent_app_date] => 2016-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28831 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15570291 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11694372 [patent_doc_number] => 20170170090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-15 [patent_title] => 'POWER MOS TRANSISTOR DIE WITH TEMPERATURE SENSING FUNCTION AND INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 15/093753 [patent_app_country] => US [patent_app_date] => 2016-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4899 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093753 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11754133 [patent_doc_number] => 09712158 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-07-18 [patent_title] => 'Apparatus and methods for biasing radio frequency switches' [patent_app_type] => utility [patent_app_number] => 15/092975 [patent_app_country] => US [patent_app_date] => 2016-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 11553 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15092975 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11898831 [patent_doc_number] => 09768778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-19 [patent_title] => 'High voltage level shifter in ultra low power supply memory application' [patent_app_type] => utility [patent_app_number] => 15/093716 [patent_app_country] => US [patent_app_date] => 2016-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2970 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093716 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10993229 [patent_doc_number] => 20160190174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'Driver Circuit, Display Device, And Electronic Device' [patent_app_type] => utility [patent_app_number] => 15/062265 [patent_app_country] => US [patent_app_date] => 2016-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 36745 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15062265 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11451480 [patent_doc_number] => 09575119 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-21 [patent_title] => 'Measurement of signal delays in microprocessor integrated circuits with sub-picosecond accuracy using frequency stepping' [patent_app_type] => utility [patent_app_number] => 15/040423 [patent_app_country] => US [patent_app_date] => 2016-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7588 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15040423 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12550230 [patent_doc_number] => 10012957 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-03 [patent_title] => Time measurement device [patent_app_type] => utility [patent_app_number] => 15/544773 [patent_app_country] => US [patent_app_date] => 2016-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 13957 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15544773 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11638637 [patent_doc_number] => 09660627 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-23 [patent_title] => 'System and techniques for repeating differential signals' [patent_app_type] => utility [patent_app_number] => 14/988371 [patent_app_country] => US [patent_app_date] => 2016-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 12384 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14988371 [rel_patent_id] =>[rel_patent_doc_number] =>)