Search

Srirama T. Channavajjala

Examiner (ID: 8544)

Most Active Art Unit
2157
Art Unit(s)
2157, 2154, 2164, 2771, 2177, 2158, 2777, 2166, 2161, 2776
Total Applications
1249
Issued Applications
847
Pending Applications
104
Abandoned Applications
304

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9595146 [patent_doc_number] => 20140191824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'MULTILAYER COMMON MODE FILTER' [patent_app_type] => utility [patent_app_number] => 14/132731 [patent_app_country] => US [patent_app_date] => 2013-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5894 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14132731 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/132731
Multilayer common mode filter Dec 17, 2013 Issued
Array ( [id] => 9797016 [patent_doc_number] => 20150008960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-08 [patent_title] => 'DIGITAL PHASE DETECTOR' [patent_app_type] => utility [patent_app_number] => 14/132635 [patent_app_country] => US [patent_app_date] => 2013-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6532 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14132635 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/132635
Digital phase detector Dec 17, 2013 Issued
Array ( [id] => 10119209 [patent_doc_number] => 09154105 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-06 [patent_title] => 'Dual-band microstrip-to-slotline transition circuit' [patent_app_type] => utility [patent_app_number] => 14/103946 [patent_app_country] => US [patent_app_date] => 2013-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3293 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14103946 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/103946
Dual-band microstrip-to-slotline transition circuit Dec 11, 2013 Issued
Array ( [id] => 9971971 [patent_doc_number] => 09018987 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-04-28 [patent_title] => 'Current reused stacked ring oscillator and injection locked divider, injection locked multiplier' [patent_app_type] => utility [patent_app_number] => 14/090744 [patent_app_country] => US [patent_app_date] => 2013-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8103 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14090744 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/090744
Current reused stacked ring oscillator and injection locked divider, injection locked multiplier Nov 25, 2013 Issued
Array ( [id] => 11796555 [patent_doc_number] => 09406398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-02 [patent_title] => 'Driver circuit, display device including the driver circuit, and electronic appliance including the display device' [patent_app_type] => utility [patent_app_number] => 14/068012 [patent_app_country] => US [patent_app_date] => 2013-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 11186 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14068012 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/068012
Driver circuit, display device including the driver circuit, and electronic appliance including the display device Oct 30, 2013 Issued
Array ( [id] => 9996886 [patent_doc_number] => 09041488 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Adjustable waveguide busbar' [patent_app_type] => utility [patent_app_number] => 14/064363 [patent_app_country] => US [patent_app_date] => 2013-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3455 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14064363 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/064363
Adjustable waveguide busbar Oct 27, 2013 Issued
Array ( [id] => 10217853 [patent_doc_number] => 20150102845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-16 [patent_title] => 'Phase Locked Loop' [patent_app_type] => utility [patent_app_number] => 14/050691 [patent_app_country] => US [patent_app_date] => 2013-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3389 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14050691 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/050691
Phase locked loop Oct 9, 2013 Issued
Array ( [id] => 9851000 [patent_doc_number] => 08952736 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-02-10 [patent_title] => 'Method and system for quantization-free and phase-dithered fractional-N generation for phase-locked-loops' [patent_app_type] => utility [patent_app_number] => 14/050209 [patent_app_country] => US [patent_app_date] => 2013-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10427 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14050209 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/050209
Method and system for quantization-free and phase-dithered fractional-N generation for phase-locked-loops Oct 8, 2013 Issued
Array ( [id] => 9394442 [patent_doc_number] => 20140091848 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'DIRECT SAMPLING CIRCUIT AND RECEIVER' [patent_app_type] => utility [patent_app_number] => 14/033930 [patent_app_country] => US [patent_app_date] => 2013-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 10342 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14033930 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/033930
Direct sampling circuit and receiver Sep 22, 2013 Issued
Array ( [id] => 9220824 [patent_doc_number] => 20140015599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'SUBSTRATE BIAS CONTROL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/025171 [patent_app_country] => US [patent_app_date] => 2013-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2798 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14025171 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/025171
Substrate bias control circuit Sep 11, 2013 Issued
Array ( [id] => 10016657 [patent_doc_number] => 09059682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-16 [patent_title] => 'Orthomode junction assembly with associated filters for use in an antenna feed system' [patent_app_type] => utility [patent_app_number] => 13/974640 [patent_app_country] => US [patent_app_date] => 2013-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 3198 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13974640 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/974640
Orthomode junction assembly with associated filters for use in an antenna feed system Aug 22, 2013 Issued
Array ( [id] => 10183672 [patent_doc_number] => 09213350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-15 [patent_title] => 'Impedance transformation with transistor circuits' [patent_app_type] => utility [patent_app_number] => 13/970570 [patent_app_country] => US [patent_app_date] => 2013-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12366 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13970570 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/970570
Impedance transformation with transistor circuits Aug 18, 2013 Issued
Array ( [id] => 9869942 [patent_doc_number] => 08957718 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-17 [patent_title] => 'Flip-flop circuit' [patent_app_type] => utility [patent_app_number] => 13/953491 [patent_app_country] => US [patent_app_date] => 2013-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12732 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 693 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13953491 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/953491
Flip-flop circuit Jul 28, 2013 Issued
Array ( [id] => 10625109 [patent_doc_number] => 09344067 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-05-17 [patent_title] => 'Dual interlocked cell (DICE) storage element with reduced charge sharing' [patent_app_type] => utility [patent_app_number] => 13/951780 [patent_app_country] => US [patent_app_date] => 2013-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6183 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13951780 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/951780
Dual interlocked cell (DICE) storage element with reduced charge sharing Jul 25, 2013 Issued
Array ( [id] => 9278391 [patent_doc_number] => 20140028359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-30 [patent_title] => 'Frequency multiplier circuit and system' [patent_app_type] => utility [patent_app_number] => 13/951331 [patent_app_country] => US [patent_app_date] => 2013-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2470 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13951331 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/951331
Frequency multiplier circuit and system Jul 24, 2013 Issued
Array ( [id] => 9246201 [patent_doc_number] => 08610486 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-17 [patent_title] => 'Current-mode analog computational circuit' [patent_app_type] => utility [patent_app_number] => 13/934171 [patent_app_country] => US [patent_app_date] => 2013-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3831 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13934171 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/934171
Current-mode analog computational circuit Jul 1, 2013 Issued
Array ( [id] => 9627391 [patent_doc_number] => 08797077 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Master-slave flip-flop circuit' [patent_app_type] => utility [patent_app_number] => 13/921732 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 7214 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13921732 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/921732
Master-slave flip-flop circuit Jun 18, 2013 Issued
Array ( [id] => 9105184 [patent_doc_number] => 20130278315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'DUAL-TRIGGER LOW-ENERGY FLIP-FLOP CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/921138 [patent_app_country] => US [patent_app_date] => 2013-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5283 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13921138 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/921138
Dual-trigger low-energy flip-flop circuit Jun 17, 2013 Issued
Array ( [id] => 11215424 [patent_doc_number] => 09444471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-13 [patent_title] => 'Phase detector and phase-locked loop' [patent_app_type] => utility [patent_app_number] => 14/895267 [patent_app_country] => US [patent_app_date] => 2013-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6200 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14895267 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/895267
Phase detector and phase-locked loop Jun 5, 2013 Issued
Array ( [id] => 9876320 [patent_doc_number] => 08963594 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Phase-locked loop circuit' [patent_app_type] => utility [patent_app_number] => 13/892082 [patent_app_country] => US [patent_app_date] => 2013-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2877 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13892082 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/892082
Phase-locked loop circuit May 9, 2013 Issued
Menu