Search

Srirama T. Channavajjala

Examiner (ID: 8544)

Most Active Art Unit
2157
Art Unit(s)
2157, 2154, 2164, 2771, 2177, 2158, 2777, 2166, 2161, 2776
Total Applications
1249
Issued Applications
847
Pending Applications
104
Abandoned Applications
304

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10851896 [patent_doc_number] => 08878584 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-04 [patent_title] => 'Duty cycle corrector' [patent_app_type] => utility [patent_app_number] => 13/890413 [patent_app_country] => US [patent_app_date] => 2013-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2219 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13890413 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/890413
Duty cycle corrector May 8, 2013 Issued
Array ( [id] => 10930330 [patent_doc_number] => 20140333351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-13 [patent_title] => 'AUTOMATIC LOOP-BANDWIDTH CALIBRATION FOR A DIGITAL PHASED-LOCKED LOOP' [patent_app_type] => utility [patent_app_number] => 13/888490 [patent_app_country] => US [patent_app_date] => 2013-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2243 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13888490 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/888490
Automatic loop-bandwidth calibration for a digital phased-locked loop May 6, 2013 Issued
Array ( [id] => 11726977 [patent_doc_number] => 09699862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-04 [patent_title] => 'Power line non-lighting application controller system and method' [patent_app_type] => utility [patent_app_number] => 13/887551 [patent_app_country] => US [patent_app_date] => 2013-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6608 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13887551 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/887551
Power line non-lighting application controller system and method May 5, 2013 Issued
Array ( [id] => 9040509 [patent_doc_number] => 20130243148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'Integer and Half Clock Step Division Digital Variable Clock Divider' [patent_app_type] => utility [patent_app_number] => 13/888050 [patent_app_country] => US [patent_app_date] => 2013-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8117 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13888050 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/888050
Integer and half clock step division digital variable clock divider May 5, 2013 Issued
Array ( [id] => 10144967 [patent_doc_number] => 09177779 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-11-03 [patent_title] => 'Low profile electrodeless lamps with an externally-grounded probe' [patent_app_type] => utility [patent_app_number] => 13/886500 [patent_app_country] => US [patent_app_date] => 2013-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5958 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13886500 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/886500
Low profile electrodeless lamps with an externally-grounded probe May 2, 2013 Issued
Array ( [id] => 10180521 [patent_doc_number] => 09210751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'Solid state lighting, drive circuit and method of driving same' [patent_app_type] => utility [patent_app_number] => 13/875000 [patent_app_country] => US [patent_app_date] => 2013-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5143 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13875000 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/875000
Solid state lighting, drive circuit and method of driving same Apr 30, 2013 Issued
Array ( [id] => 10917163 [patent_doc_number] => 20140320183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'PLL FREQUENCY SYNTHESIZER WITH MULTI-CURVE VCO IMPLEMENTING CLOSED LOOP CURVE SEARCHING USING CHARGE PUMP CURRENT MODULATION' [patent_app_type] => utility [patent_app_number] => 13/874222 [patent_app_country] => US [patent_app_date] => 2013-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8201 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13874222 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/874222
PLL frequency synthesizer with multi-curve VCO implementing closed loop curve searching using charge pump current modulation Apr 29, 2013 Issued
Array ( [id] => 9132425 [patent_doc_number] => 20130293138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'CONTROL CIRCUIT HAVING SIGNAL PROCESSING CIRCUIT AND METHOD FOR DRIVING THE CONTROL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/873311 [patent_app_country] => US [patent_app_date] => 2013-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12255 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13873311 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/873311
Control circuit having signal processing circuit and method for driving the control circuit Apr 29, 2013 Issued
Array ( [id] => 9704888 [patent_doc_number] => 08829961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-09 [patent_title] => 'Clock generator' [patent_app_type] => utility [patent_app_number] => 13/872542 [patent_app_country] => US [patent_app_date] => 2013-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 15035 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13872542 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/872542
Clock generator Apr 28, 2013 Issued
Array ( [id] => 9542977 [patent_doc_number] => 20140167624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'LED TABLE LAMP' [patent_app_type] => utility [patent_app_number] => 13/870152 [patent_app_country] => US [patent_app_date] => 2013-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1952 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13870152 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/870152
LED table lamp Apr 24, 2013 Issued
Array ( [id] => 10180540 [patent_doc_number] => 09210770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'Lighting control system' [patent_app_type] => utility [patent_app_number] => 13/868767 [patent_app_country] => US [patent_app_date] => 2013-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 10172 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13868767 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/868767
Lighting control system Apr 22, 2013 Issued
Array ( [id] => 9456060 [patent_doc_number] => 08717075 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Phase locked loop circuit' [patent_app_type] => utility [patent_app_number] => 13/867575 [patent_app_country] => US [patent_app_date] => 2013-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2116 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13867575 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/867575
Phase locked loop circuit Apr 21, 2013 Issued
Array ( [id] => 9118638 [patent_doc_number] => 20130285560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'TERMINAL APPARATUS, BACKLIGHT CONTROL METHOD, AND BACKLIGHT CONTROL PROGRAM' [patent_app_type] => utility [patent_app_number] => 13/863288 [patent_app_country] => US [patent_app_date] => 2013-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9064 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13863288 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/863288
Terminal apparatus, backlight control method, and backlight control program Apr 14, 2013 Issued
Array ( [id] => 10539480 [patent_doc_number] => 09265126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Method and apparatus for using portable terminal' [patent_app_type] => utility [patent_app_number] => 13/860733 [patent_app_country] => US [patent_app_date] => 2013-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3172 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13860733 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/860733
Method and apparatus for using portable terminal Apr 10, 2013 Issued
Array ( [id] => 9000890 [patent_doc_number] => 20130222014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'DIFFERENTIAL CURRENT SIGNAL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/859366 [patent_app_country] => US [patent_app_date] => 2013-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13237 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859366 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/859366
Differential current signal circuit Apr 8, 2013 Issued
Array ( [id] => 8987558 [patent_doc_number] => 20130214839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-22 [patent_title] => 'SINGLE-TRIGGER LOW-ENERGY FLIP-FLOP CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/852987 [patent_app_country] => US [patent_app_date] => 2013-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4579 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13852987 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/852987
Single-trigger low-energy flip-flop circuit Mar 27, 2013 Issued
Array ( [id] => 9876322 [patent_doc_number] => 08963596 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Delay locked loop and data reception of a semiconductor apparatus' [patent_app_type] => utility [patent_app_number] => 13/845368 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3934 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13845368 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/845368
Delay locked loop and data reception of a semiconductor apparatus Mar 17, 2013 Issued
Array ( [id] => 10832302 [patent_doc_number] => 08860478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-14 [patent_title] => 'Phase-locked loop with loop gain calibration, gain measurement method, gain calibration method and jitter measurement method for phase-locked loop' [patent_app_type] => utility [patent_app_number] => 13/840134 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 5891 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13840134 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/840134
Phase-locked loop with loop gain calibration, gain measurement method, gain calibration method and jitter measurement method for phase-locked loop Mar 14, 2013 Issued
Array ( [id] => 9697392 [patent_doc_number] => 20140247077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-04 [patent_title] => 'SEMICONDUCTOR CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/834603 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9477 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13834603 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/834603
Clock gating circuit Mar 14, 2013 Issued
Array ( [id] => 9360982 [patent_doc_number] => 20140070854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-13 [patent_title] => 'INTEGRATED CIRCUIT COMPRISING FREQUENCY CHANGE DETECTION CIRCUITRY' [patent_app_type] => utility [patent_app_number] => 13/839059 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4805 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13839059 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/839059
Integrated circuit comprising frequency change detection circuitry Mar 14, 2013 Issued
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