Search

Stacy Brown Chen

Examiner (ID: 4308, Phone: (571)272-0896 , Office: P/1648 )

Most Active Art Unit
1648
Art Unit(s)
1671, 1648, 1672
Total Applications
1666
Issued Applications
929
Pending Applications
186
Abandoned Applications
576

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20609982 [patent_doc_number] => 12585584 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Solid state storage device and patrol read method using word line groupings thereof [patent_app_type] => utility [patent_app_number] => 18/806776 [patent_app_country] => US [patent_app_date] => 2024-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2147 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18806776 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/806776
Solid state storage device and patrol read method using word line groupings thereof Aug 15, 2024 Issued
Array ( [id] => 19756634 [patent_doc_number] => 20250045199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => MEMORY SYSTEM AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/786782 [patent_app_country] => US [patent_app_date] => 2024-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9638 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18786782 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/786782
Memory system and control method Jul 28, 2024 Issued
Array ( [id] => 19725734 [patent_doc_number] => 20250028485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => PERFORMANCE IN A FRAGMENTED MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/785276 [patent_app_country] => US [patent_app_date] => 2024-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11026 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18785276 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/785276
PERFORMANCE IN A FRAGMENTED MEMORY SYSTEM Jul 25, 2024 Pending
Array ( [id] => 20440223 [patent_doc_number] => 12511059 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Power efficient codeword scrambling in a non-volatile memory device [patent_app_type] => utility [patent_app_number] => 18/774803 [patent_app_country] => US [patent_app_date] => 2024-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2378 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18774803 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/774803
Power efficient codeword scrambling in a non-volatile memory device Jul 15, 2024 Issued
Array ( [id] => 20570654 [patent_doc_number] => 20260064579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-05 [patent_title] => METHODS AND SYSTEMS FOR ACCESSING DATA BLOCKS STORED IN NON-VOLATILE MEMORY BY MULTIPLE PROCESSORS OF A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/767876 [patent_app_country] => US [patent_app_date] => 2024-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18767876 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/767876
METHODS AND SYSTEMS FOR ACCESSING DATA BLOCKS STORED IN NON-VOLATILE MEMORY BY MULTIPLE PROCESSORS OF A MEMORY DEVICE Jul 8, 2024 Pending
Array ( [id] => 20043275 [patent_doc_number] => 20250181497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => IDENTIFYING WORDLINES SUSCEPTIBLE TO DEEPER ERASE CONDITIONS [patent_app_type] => utility [patent_app_number] => 18/751250 [patent_app_country] => US [patent_app_date] => 2024-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18751250 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/751250
IDENTIFYING WORDLINES SUSCEPTIBLE TO DEEPER ERASE CONDITIONS Jun 21, 2024 Pending
Array ( [id] => 20428337 [patent_doc_number] => 20250390429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-25 [patent_title] => EFFICIENT USAGE OF WRITEBOOSTER BUFFER IN PRESERVE USER SPACE MODE [patent_app_type] => utility [patent_app_number] => 18/751002 [patent_app_country] => US [patent_app_date] => 2024-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18751002 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/751002
Efficient usage of writebooster buffer in preserve user space mode Jun 20, 2024 Issued
Array ( [id] => 20281893 [patent_doc_number] => 20250307135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => METHODS OF OPERATING MEMORY SYSTEM, MEMORY SYSTEMS, HOSTS, AND MEMORY CONTROLLERS [patent_app_type] => utility [patent_app_number] => 18/744065 [patent_app_country] => US [patent_app_date] => 2024-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7539 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744065 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/744065
METHODS OF OPERATING MEMORY SYSTEM, MEMORY SYSTEMS, HOSTS, AND MEMORY CONTROLLERS Jun 13, 2024 Pending
Array ( [id] => 19481845 [patent_doc_number] => 20240329887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => ADDRESSING IN MEMORY WITH A READ IDENTIFICATION (RID) NUMBER [patent_app_type] => utility [patent_app_number] => 18/743998 [patent_app_country] => US [patent_app_date] => 2024-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18743998 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/743998
Addressing in memory with a read identification (rid) number Jun 13, 2024 Issued
Array ( [id] => 20580213 [patent_doc_number] => 12572464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-10 [patent_title] => Vehicle non-volatile memory initization control strategy [patent_app_type] => utility [patent_app_number] => 18/739515 [patent_app_country] => US [patent_app_date] => 2024-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 0 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18739515 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/739515
Vehicle non-volatile memory initization control strategy Jun 10, 2024 Issued
Array ( [id] => 19899133 [patent_doc_number] => 12277054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Logical address allocation for submission queue entry [patent_app_type] => utility [patent_app_number] => 18/731034 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 7193 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18731034 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/731034
Logical address allocation for submission queue entry May 30, 2024 Issued
Array ( [id] => 19451164 [patent_doc_number] => 20240311294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => MEMORY SYSTEM AND NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/673842 [patent_app_country] => US [patent_app_date] => 2024-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18673842 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/673842
MEMORY SYSTEM AND NON-VOLATILE MEMORY May 23, 2024 Pending
Array ( [id] => 20365985 [patent_doc_number] => 20250355797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-20 [patent_title] => PERSISTING DEVICE OPERATIONS ACROSS MODES IN A MULTI-PROTOCOL STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/668484 [patent_app_country] => US [patent_app_date] => 2024-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1130 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18668484 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/668484
Completing a device operation initiated in a first mode in a second mode in a multi-protocol storage device May 19, 2024 Issued
Array ( [id] => 20188752 [patent_doc_number] => 12399866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Heuristic interface for enabling a computer device to utilize data property-based data placement inside a nonvolatile memory device [patent_app_type] => utility [patent_app_number] => 18/666711 [patent_app_country] => US [patent_app_date] => 2024-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1169 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18666711 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/666711
Heuristic interface for enabling a computer device to utilize data property-based data placement inside a nonvolatile memory device May 15, 2024 Issued
Array ( [id] => 20351574 [patent_doc_number] => 20250348426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => In-NAND LLR Generation [patent_app_type] => utility [patent_app_number] => 18/661307 [patent_app_country] => US [patent_app_date] => 2024-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2952 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18661307 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/661307
In-NAND LLR Generation May 9, 2024 Pending
Array ( [id] => 19383147 [patent_doc_number] => 20240273017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => VALID DATA RETRIEVAL FOR GARBAGE COLLECTION [patent_app_type] => utility [patent_app_number] => 18/644242 [patent_app_country] => US [patent_app_date] => 2024-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18644242 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/644242
Valid data retrieval for garbage collection Apr 23, 2024 Issued
Array ( [id] => 19588401 [patent_doc_number] => 20240385958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => EXCEPTION LIST COMPRESSION FOR LOGICAL-TO-PHYSICAL TABLES [patent_app_type] => utility [patent_app_number] => 18/642030 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14322 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18642030 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/642030
EXCEPTION LIST COMPRESSION FOR LOGICAL-TO-PHYSICAL TABLES Apr 21, 2024 Pending
Array ( [id] => 20027167 [patent_doc_number] => 20250165389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => APPARATUS AND METHOD FOR DISTRIBUTING AND STORING WRITE DATA IN PLURAL MEMORY REGIONS [patent_app_type] => utility [patent_app_number] => 18/641432 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9892 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641432 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/641432
APPARATUS AND METHOD FOR DISTRIBUTING AND STORING WRITE DATA IN PLURAL MEMORY REGIONS Apr 21, 2024 Pending
Array ( [id] => 20265889 [patent_doc_number] => 12436881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Host accelerated operations in managed nand devices [patent_app_type] => utility [patent_app_number] => 18/637075 [patent_app_country] => US [patent_app_date] => 2024-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 9877 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18637075 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/637075
Host accelerated operations in managed nand devices Apr 15, 2024 Issued
Array ( [id] => 20440407 [patent_doc_number] => 12511243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Host assisted operations in managed memory devices [patent_app_type] => utility [patent_app_number] => 18/633149 [patent_app_country] => US [patent_app_date] => 2024-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7271 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18633149 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/633149
Host assisted operations in managed memory devices Apr 10, 2024 Issued
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