Search

Stacy Whitmore

Examiner (ID: 3082)

Most Active Art Unit
2851
Art Unit(s)
2783, 2183, 2812, 2825, 2851
Total Applications
1957
Issued Applications
1772
Pending Applications
36
Abandoned Applications
154

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16567267 [patent_doc_number] => 10892648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Wireless power transfer method, apparatus and system for low and medium power [patent_app_type] => utility [patent_app_number] => 16/519447 [patent_app_country] => US [patent_app_date] => 2019-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 36 [patent_no_of_words] => 16971 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16519447 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/519447
Wireless power transfer method, apparatus and system for low and medium power Jul 22, 2019 Issued
Array ( [id] => 16601978 [patent_doc_number] => 20210028509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-28 [patent_title] => BATTERY FAST-CHARGING SYSTEM AND METHOD OF OPERATING SAME [patent_app_type] => utility [patent_app_number] => 16/519891 [patent_app_country] => US [patent_app_date] => 2019-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10445 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16519891 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/519891
Battery fast-charging system and method of operating same Jul 22, 2019 Issued
Array ( [id] => 15416109 [patent_doc_number] => 20200028377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => LOW-COST TASK SPECIFIC DEVICE SCHEDULING SYSTEM [patent_app_type] => utility [patent_app_number] => 16/517561 [patent_app_country] => US [patent_app_date] => 2019-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5182 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16517561 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/517561
Low-cost task specific device scheduling system Jul 19, 2019 Issued
Array ( [id] => 17149027 [patent_doc_number] => 11142086 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Non-contact power supply device [patent_app_type] => utility [patent_app_number] => 16/510110 [patent_app_country] => US [patent_app_date] => 2019-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6856 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16510110 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/510110
Non-contact power supply device Jul 11, 2019 Issued
Array ( [id] => 16577437 [patent_doc_number] => 20210011838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => PARTIAL-RESULTS POST-SILICON HARDWARE EXERCISER [patent_app_type] => utility [patent_app_number] => 16/505744 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5087 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16505744 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/505744
Partial-results post-silicon hardware exerciser Jul 8, 2019 Issued
Array ( [id] => 15001043 [patent_doc_number] => 20190319479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-17 [patent_title] => ENERGY STORAGE DEVICE FOR A PHOTOVOLTAIC SYSTEM, AND METHOD FOR OPERATING AN ENERGY STORAGE DEVICE OF A PHOTOVOLTAIC SYSTEM [patent_app_type] => utility [patent_app_number] => 16/454734 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2622 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16454734 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/454734
ENERGY STORAGE DEVICE FOR A PHOTOVOLTAIC SYSTEM, AND METHOD FOR OPERATING AN ENERGY STORAGE DEVICE OF A PHOTOVOLTAIC SYSTEM Jun 26, 2019 Abandoned
Array ( [id] => 17039773 [patent_doc_number] => 20210256409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => MULTI-QUBIT CONTROL [patent_app_type] => utility [patent_app_number] => 16/754684 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13545 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16754684 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/754684
Multi-qubit control Jun 23, 2019 Issued
Array ( [id] => 16385502 [patent_doc_number] => 10810341 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-20 [patent_title] => Method and system for making pin-to-pin signal connections [patent_app_type] => utility [patent_app_number] => 16/443244 [patent_app_country] => US [patent_app_date] => 2019-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5657 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16443244 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/443244
Method and system for making pin-to-pin signal connections Jun 16, 2019 Issued
Array ( [id] => 16802399 [patent_doc_number] => 10997346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Conception of a 3D circuit comprising macros [patent_app_type] => utility [patent_app_number] => 16/443509 [patent_app_country] => US [patent_app_date] => 2019-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 9397 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16443509 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/443509
Conception of a 3D circuit comprising macros Jun 16, 2019 Issued
Array ( [id] => 15329165 [patent_doc_number] => 20200004912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => METHOD AND SYSTEM OF REVISING A LAYOUT DIAGRAM [patent_app_type] => utility [patent_app_number] => 16/441802 [patent_app_country] => US [patent_app_date] => 2019-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25008 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16441802 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/441802
Method and system of revising a layout diagram Jun 13, 2019 Issued
Array ( [id] => 14901967 [patent_doc_number] => 20190294749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => SYSTEM AND METHOD FOR DESIGNING POWER SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/439953 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6051 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439953 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/439953
System and method for designing power systems Jun 12, 2019 Issued
Array ( [id] => 16508325 [patent_doc_number] => 20200387581 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => VIAS WITH MULTICONNECTION VIA STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/434624 [patent_app_country] => US [patent_app_date] => 2019-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4509 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16434624 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/434624
Vias with multiconnection via structures Jun 6, 2019 Issued
Array ( [id] => 16279135 [patent_doc_number] => 10762166 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-01 [patent_title] => Adaptive accelerated yield analysis [patent_app_type] => utility [patent_app_number] => 16/434334 [patent_app_country] => US [patent_app_date] => 2019-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8319 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16434334 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/434334
Adaptive accelerated yield analysis Jun 6, 2019 Issued
Array ( [id] => 16186313 [patent_doc_number] => 10719647 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-21 [patent_title] => Speed converter for FPGA-based UFS prototypes [patent_app_type] => utility [patent_app_number] => 16/434435 [patent_app_country] => US [patent_app_date] => 2019-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 10929 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16434435 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/434435
Speed converter for FPGA-based UFS prototypes Jun 6, 2019 Issued
Array ( [id] => 16494713 [patent_doc_number] => 10860756 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-08 [patent_title] => Finding intersections of planar parametric curves based on error-controlled discretization [patent_app_type] => utility [patent_app_number] => 16/430020 [patent_app_country] => US [patent_app_date] => 2019-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 12339 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16430020 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/430020
Finding intersections of planar parametric curves based on error-controlled discretization Jun 2, 2019 Issued
Array ( [id] => 16607597 [patent_doc_number] => 10908598 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-02 [patent_title] => Integrated circuits designed for multiple sets of criteria [patent_app_type] => utility [patent_app_number] => 16/426945 [patent_app_country] => US [patent_app_date] => 2019-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5207 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16426945 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/426945
Integrated circuits designed for multiple sets of criteria May 29, 2019 Issued
Array ( [id] => 18721942 [patent_doc_number] => 11799302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Power conversion system [patent_app_type] => utility [patent_app_number] => 16/972274 [patent_app_country] => US [patent_app_date] => 2019-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 7856 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16972274 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/972274
Power conversion system May 28, 2019 Issued
Array ( [id] => 16354921 [patent_doc_number] => 10795430 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-06 [patent_title] => Activity-aware supply voltage and bias voltage compensation [patent_app_type] => utility [patent_app_number] => 16/421730 [patent_app_country] => US [patent_app_date] => 2019-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2883 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16421730 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/421730
Activity-aware supply voltage and bias voltage compensation May 23, 2019 Issued
Array ( [id] => 15182495 [patent_doc_number] => 20190361839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => DISTRIBUTED ERROR AND ANOMALY COMMUNICATION ARCHITECTURE FOR ANALOG AND MIXED-SIGNAL SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/422714 [patent_app_country] => US [patent_app_date] => 2019-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16422714 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/422714
Distributed error and anomaly communication architecture for analog and mixed-signal systems May 23, 2019 Issued
Array ( [id] => 16249369 [patent_doc_number] => 10748744 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-18 [patent_title] => Method and system for determining a charged particle beam exposure for a local pattern density [patent_app_type] => utility [patent_app_number] => 16/422269 [patent_app_country] => US [patent_app_date] => 2019-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 42 [patent_no_of_words] => 15201 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16422269 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/422269
Method and system for determining a charged particle beam exposure for a local pattern density May 23, 2019 Issued
Menu