Search

Stanetta D. Isaac

Examiner (ID: 5767, Phone: (571)272-1671 , Office: P/2898 )

Most Active Art Unit
2898
Art Unit(s)
2812, 2898
Total Applications
1458
Issued Applications
1176
Pending Applications
128
Abandoned Applications
181

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18097862 [patent_doc_number] => 20220416203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/834952 [patent_app_country] => US [patent_app_date] => 2022-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17834952 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/834952
ELECTRONIC DEVICE Jun 7, 2022 Pending
Array ( [id] => 20469452 [patent_doc_number] => 12525495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Mixed dielectric materials for improving signal integrity of integrated electronics packages [patent_app_type] => utility [patent_app_number] => 17/832541 [patent_app_country] => US [patent_app_date] => 2022-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 6412 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17832541 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/832541
Mixed dielectric materials for improving signal integrity of integrated electronics packages Jun 2, 2022 Issued
Array ( [id] => 17900885 [patent_doc_number] => 20220310547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => DICING DIE ATTACH FILM AND METHOD OF PRODUCING THE SAME, AND SEMICONDUCTOR PACKAGE AND METHOD OF PRODUCING THE SAME [patent_app_type] => utility [patent_app_number] => 17/826793 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16030 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17826793 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/826793
DICING DIE ATTACH FILM AND METHOD OF PRODUCING THE SAME, AND SEMICONDUCTOR PACKAGE AND METHOD OF PRODUCING THE SAME May 26, 2022 Pending
Array ( [id] => 18789561 [patent_doc_number] => 20230378254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/748068 [patent_app_country] => US [patent_app_date] => 2022-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3969 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17748068 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/748068
Semiconductor device and manufacturing method thereof May 18, 2022 Issued
Array ( [id] => 18696509 [patent_doc_number] => 20230326948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE, AND IMAGING APPARATUS [patent_app_type] => utility [patent_app_number] => 17/746290 [patent_app_country] => US [patent_app_date] => 2022-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6171 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17746290 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/746290
METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE, AND IMAGING APPARATUS May 16, 2022 Pending
Array ( [id] => 18782123 [patent_doc_number] => 11823889 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Sensor and method of forming the same [patent_app_type] => utility [patent_app_number] => 17/741467 [patent_app_country] => US [patent_app_date] => 2022-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 9986 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17741467 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/741467
Sensor and method of forming the same May 10, 2022 Issued
Array ( [id] => 18488484 [patent_doc_number] => 20230215832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => NON CONDUCTIVE FILM, METHOD FOR FORMING NON CONDUCTIVE FILM, CHIP PACKAGE STRUCTURE, AND METHOD FOR PACKAGING CHIP [patent_app_type] => utility [patent_app_number] => 17/662641 [patent_app_country] => US [patent_app_date] => 2022-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5218 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17662641 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/662641
NON CONDUCTIVE FILM, METHOD FOR FORMING NON CONDUCTIVE FILM, CHIP PACKAGE STRUCTURE, AND METHOD FOR PACKAGING CHIP May 8, 2022 Pending
Array ( [id] => 18696458 [patent_doc_number] => 20230326897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => DIE BACKSIDE METALLIZATION METHODS AND APPARATUS [patent_app_type] => utility [patent_app_number] => 17/658691 [patent_app_country] => US [patent_app_date] => 2022-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2536 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17658691 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/658691
DIE BACKSIDE METALLIZATION METHODS AND APPARATUS Apr 10, 2022 Pending
Array ( [id] => 18680008 [patent_doc_number] => 20230317666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => SEMICONDUCTOR DEVICE WITH METAL SILICIDE LAYER [patent_app_type] => utility [patent_app_number] => 17/712738 [patent_app_country] => US [patent_app_date] => 2022-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13652 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17712738 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/712738
SEMICONDUCTOR DEVICE WITH METAL SILICIDE LAYER Apr 3, 2022 Pending
Array ( [id] => 17917701 [patent_doc_number] => 20220320097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => MEMORY-ELEMENT-INCLUDING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/706880 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 450 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17706880 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/706880
MEMORY-ELEMENT-INCLUDING SEMICONDUCTOR DEVICE Mar 28, 2022 Abandoned
Array ( [id] => 20748497 [patent_doc_number] => 12648440 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-02 [patent_title] => Method for manufacturing double-sided cooling type power module and double-sided cooling type power module [patent_app_type] => utility [patent_app_number] => 17/703057 [patent_app_country] => US [patent_app_date] => 2022-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 0 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17703057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/703057
Method for manufacturing double-sided cooling type power module and double-sided cooling type power module Mar 23, 2022 Issued
Array ( [id] => 18661509 [patent_doc_number] => 20230307523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH GATE STACK [patent_app_type] => utility [patent_app_number] => 17/701997 [patent_app_country] => US [patent_app_date] => 2022-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8330 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17701997 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/701997
STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH GATE STACK Mar 22, 2022 Pending
Array ( [id] => 18165436 [patent_doc_number] => 20230032035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => SEMICONDUCTOR MODULE [patent_app_type] => utility [patent_app_number] => 17/698371 [patent_app_country] => US [patent_app_date] => 2022-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11220 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17698371 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/698371
SEMICONDUCTOR MODULE Mar 17, 2022 Pending
Array ( [id] => 18320709 [patent_doc_number] => 20230118837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SAME AND APPLICATION THEREOF [patent_app_type] => utility [patent_app_number] => 17/698106 [patent_app_country] => US [patent_app_date] => 2022-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5741 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17698106 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/698106
SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SAME AND APPLICATION THEREOF Mar 17, 2022 Abandoned
Array ( [id] => 17708680 [patent_doc_number] => 20220208688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => Method of Forming Semiconductor Device [patent_app_type] => utility [patent_app_number] => 17/654620 [patent_app_country] => US [patent_app_date] => 2022-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8083 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17654620 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/654620
Method of forming semiconductor device Mar 13, 2022 Issued
Array ( [id] => 17870788 [patent_doc_number] => 20220293525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => PACKAGED HALF-BRIDGE CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/692229 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3838 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17692229 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/692229
PACKAGED HALF-BRIDGE CIRCUIT Mar 10, 2022 Pending
Array ( [id] => 20118420 [patent_doc_number] => 12368139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Structures for providing electrical isolation in semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/680437 [patent_app_country] => US [patent_app_date] => 2022-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17680437 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/680437
Structures for providing electrical isolation in semiconductor devices Feb 24, 2022 Issued
Array ( [id] => 19751586 [patent_doc_number] => 20250040151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => SWITCH DEVICE AND MEMORY [patent_app_type] => utility [patent_app_number] => 18/715123 [patent_app_country] => US [patent_app_date] => 2022-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3311 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18715123 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/715123
SWITCH DEVICE AND MEMORY Feb 22, 2022 Pending
Array ( [id] => 18024380 [patent_doc_number] => 20220375879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 17/651792 [patent_app_country] => US [patent_app_date] => 2022-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4157 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651792 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/651792
SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAME Feb 18, 2022 Abandoned
Array ( [id] => 20133990 [patent_doc_number] => 12376321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Semiconductor device with silicide structures surrounding epitaxial structures and method of making the same [patent_app_type] => utility [patent_app_number] => 17/675108 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 27 [patent_no_of_words] => 3340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17675108 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/675108
Semiconductor device with silicide structures surrounding epitaxial structures and method of making the same Feb 17, 2022 Issued
Menu