Search

Stella Eun Higgs

Examiner (ID: 3981, Phone: (571)270-5891 , Office: P/2179 )

Most Active Art Unit
2179
Art Unit(s)
2189, 4132, 2179, 3681, 3686, 3628
Total Applications
416
Issued Applications
148
Pending Applications
61
Abandoned Applications
209

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18024031 [patent_doc_number] => 20220375530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => MULTI-TIER THRESHOLD VOLTAGE OFFSET BIN CALIBRATION [patent_app_type] => utility [patent_app_number] => 17/880980 [patent_app_country] => US [patent_app_date] => 2022-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11305 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880980 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/880980
Multi-tier threshold voltage offset bin calibration Aug 3, 2022 Issued
Array ( [id] => 18140088 [patent_doc_number] => 20230013927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => MULTI-VOLTAGE OPERATION FOR DRIVING A MULTI-MODE CHANNEL [patent_app_type] => utility [patent_app_number] => 17/879512 [patent_app_country] => US [patent_app_date] => 2022-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20563 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17879512 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/879512
Multi-voltage operation for driving a multi-mode channel Aug 1, 2022 Issued
Array ( [id] => 19155086 [patent_doc_number] => 11980022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Memory device using semiconductor element [patent_app_type] => utility [patent_app_number] => 17/878485 [patent_app_country] => US [patent_app_date] => 2022-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 22 [patent_no_of_words] => 7071 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 402 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878485 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/878485
Memory device using semiconductor element Jul 31, 2022 Issued
Array ( [id] => 19525730 [patent_doc_number] => 12127488 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Resistive random access memory structure and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 17/876560 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2978 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876560 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876560
Resistive random access memory structure and fabrication method thereof Jul 28, 2022 Issued
Array ( [id] => 19244339 [patent_doc_number] => 12014790 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Method, system and computer program product for memory repair [patent_app_type] => utility [patent_app_number] => 17/815096 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 15160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815096 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815096
Method, system and computer program product for memory repair Jul 25, 2022 Issued
Array ( [id] => 17992953 [patent_doc_number] => 20220358990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/870880 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4354 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870880 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/870880
Memory system Jul 21, 2022 Issued
Array ( [id] => 19399528 [patent_doc_number] => 12073914 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => Memory device, a memory system and an operating method of the memory device [patent_app_type] => utility [patent_app_number] => 17/869061 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 9640 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869061 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/869061
Memory device, a memory system and an operating method of the memory device Jul 19, 2022 Issued
Array ( [id] => 18789010 [patent_doc_number] => 20230377618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => CIRCUIT FOR SYNCHRONIZATION FOR AN INTERCONNECTION PROTOCOL, CONTROLLER AND STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/869429 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12944 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869429 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/869429
Circuit for synchronization for an interconnection protocol, controller and storage device Jul 19, 2022 Issued
Array ( [id] => 19294327 [patent_doc_number] => 12033688 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Sense amplification structure and memory architecture [patent_app_type] => utility [patent_app_number] => 17/812032 [patent_app_country] => US [patent_app_date] => 2022-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 6700 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 337 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17812032 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/812032
Sense amplification structure and memory architecture Jul 11, 2022 Issued
Array ( [id] => 18898337 [patent_doc_number] => 20240013822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => ADJUSTABLE MEMORY CELL RELIABILITY MANAGEMENT [patent_app_type] => utility [patent_app_number] => 17/861231 [patent_app_country] => US [patent_app_date] => 2022-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17861231 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/861231
Adjustable memory cell reliability management Jul 9, 2022 Issued
Array ( [id] => 18181254 [patent_doc_number] => 20230041983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => INTERFACE FOR REFRESHING NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 17/811230 [patent_app_country] => US [patent_app_date] => 2022-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17811230 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/811230
Interface for refreshing non-volatile memory Jul 6, 2022 Issued
Array ( [id] => 17948977 [patent_doc_number] => 20220335996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/855107 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7209 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855107 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855107
Memory device Jun 29, 2022 Issued
Array ( [id] => 19168264 [patent_doc_number] => 11984175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Automatic mirrored ROM [patent_app_type] => utility [patent_app_number] => 17/855628 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5468 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855628 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855628
Automatic mirrored ROM Jun 29, 2022 Issued
Array ( [id] => 19596804 [patent_doc_number] => 12154657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Channel and sub-channel throttling for memory controllers [patent_app_type] => utility [patent_app_number] => 17/853418 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6147 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853418 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/853418
Channel and sub-channel throttling for memory controllers Jun 28, 2022 Issued
Array ( [id] => 18883723 [patent_doc_number] => 20240007092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => SYSTEMS AND TECHNIQUES FOR JITTER REDUCTION [patent_app_type] => utility [patent_app_number] => 17/852657 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8130 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852657 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852657
Systems and techniques for jitter reduction Jun 28, 2022 Issued
Array ( [id] => 20690279 [patent_doc_number] => 12620436 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-05 [patent_title] => Multi-ported memory array utilizing bitcells with balanced P-N diffusion layouts [patent_app_type] => utility [patent_app_number] => 17/852569 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6786 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852569 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852569
Multi-ported memory array utilizing bitcells with balanced P-N diffusion layouts Jun 28, 2022 Issued
Array ( [id] => 19429938 [patent_doc_number] => 12089391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/853098 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 14525 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853098 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/853098
Semiconductor device Jun 28, 2022 Issued
Array ( [id] => 19314191 [patent_doc_number] => 12040015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Memory device and operation method thereof for performing multiply-accumulate operation [patent_app_type] => utility [patent_app_number] => 17/848521 [patent_app_country] => US [patent_app_date] => 2022-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 3340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848521 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/848521
Memory device and operation method thereof for performing multiply-accumulate operation Jun 23, 2022 Issued
Array ( [id] => 18502340 [patent_doc_number] => 20230225219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => MAGNETIC TUNNELING JUNCTION DEVICE AND MEMORY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/847103 [patent_app_country] => US [patent_app_date] => 2022-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8312 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17847103 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/847103
Magnetic tunneling junction device and memory device including the same Jun 21, 2022 Issued
Array ( [id] => 18865594 [patent_doc_number] => 20230420031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => METHOD FOR DETERMINING TARGET LOCKING TIME OF DELAY LOCKED LOOP OF MEMORY APPARATUS [patent_app_type] => utility [patent_app_number] => 17/847031 [patent_app_country] => US [patent_app_date] => 2022-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7681 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17847031 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/847031
Method for determining target locking time of delay locked loop of memory apparatus Jun 21, 2022 Issued
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