Search

Stephanie A. N. Mcneil

Examiner (ID: 4048, Phone: (571)270-5250 , Office: P/1653 )

Most Active Art Unit
1653
Art Unit(s)
1653
Total Applications
397
Issued Applications
37
Pending Applications
85
Abandoned Applications
294

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19740089 [patent_doc_number] => 12216924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Semiconductor device and semiconductor storage device [patent_app_type] => utility [patent_app_number] => 18/500577 [patent_app_country] => US [patent_app_date] => 2023-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 30 [patent_no_of_words] => 12650 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18500577 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/500577
Semiconductor device and semiconductor storage device Nov 1, 2023 Issued
Array ( [id] => 19175870 [patent_doc_number] => 20240161844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => ANTIFUSE-TYPE NON-VOLATILE MEMORY AND CONTROL METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/370412 [patent_app_country] => US [patent_app_date] => 2023-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 374 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370412 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370412
Antifuse-type non-volatile memory and control method thereof Sep 19, 2023 Issued
Array ( [id] => 20469221 [patent_doc_number] => 12525263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Method of voltage calibration and apparatus thereof, memory and memory system [patent_app_type] => utility [patent_app_number] => 18/370644 [patent_app_country] => US [patent_app_date] => 2023-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 8651 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370644 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370644
Method of voltage calibration and apparatus thereof, memory and memory system Sep 19, 2023 Issued
Array ( [id] => 20215948 [patent_doc_number] => 12412602 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Low-power memory system and memory controller with compatibility and an operation method thereof [patent_app_type] => utility [patent_app_number] => 18/461504 [patent_app_country] => US [patent_app_date] => 2023-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18461504 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/461504
Low-power memory system and memory controller with compatibility and an operation method thereof Sep 5, 2023 Issued
Array ( [id] => 19661808 [patent_doc_number] => 20240428873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => MEMORY SYSTEM, METHOD OF OPERATING MEMORY SYSTEM, AND COMPUTER-READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/240180 [patent_app_country] => US [patent_app_date] => 2023-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11261 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18240180 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/240180
MEMORY SYSTEM, METHOD OF OPERATING MEMORY SYSTEM, AND COMPUTER-READABLE STORAGE MEDIUM Aug 29, 2023 Issued
Array ( [id] => 19918435 [patent_doc_number] => 12293808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Memory subsystem calibration using substitute results [patent_app_type] => utility [patent_app_number] => 18/455385 [patent_app_country] => US [patent_app_date] => 2023-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2430 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18455385 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/455385
Memory subsystem calibration using substitute results Aug 23, 2023 Issued
Array ( [id] => 19546141 [patent_doc_number] => 20240363177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => REGULAR TRANSISTOR THRESHOLD VOLTAGE REFRESH FOR SEMI-CIRCLE DRAIN SIDE SELECT GATES [patent_app_type] => utility [patent_app_number] => 18/226547 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13504 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18226547 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/226547
Regular transistor threshold voltage refresh for semi-circle drain side select gates Jul 25, 2023 Issued
Array ( [id] => 20667401 [patent_doc_number] => 12609181 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-21 [patent_title] => Error handling during a memory compaction process [patent_app_type] => utility [patent_app_number] => 18/359637 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7416 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359637 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359637
Error handling during a memory compaction process Jul 25, 2023 Issued
Array ( [id] => 19305200 [patent_doc_number] => 20240233780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => STORAGE DEVICE FOR IDLE POWER OPERATION AND METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/357359 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8281 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357359 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/357359
Storage device for idle power operation and method therefor Jul 23, 2023 Issued
Array ( [id] => 19376459 [patent_doc_number] => 12068037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Managing sub-block erase operations in a memory sub-system [patent_app_type] => utility [patent_app_number] => 18/224179 [patent_app_country] => US [patent_app_date] => 2023-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8734 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18224179 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/224179
Managing sub-block erase operations in a memory sub-system Jul 19, 2023 Issued
Array ( [id] => 20441307 [patent_doc_number] => 12512147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Apparatus and method for programming data into non-volatile memory device [patent_app_type] => utility [patent_app_number] => 18/348366 [patent_app_country] => US [patent_app_date] => 2023-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11559 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18348366 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/348366
Apparatus and method for programming data into non-volatile memory device Jul 6, 2023 Issued
Array ( [id] => 19886670 [patent_doc_number] => 12272394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Sensing and tuning for memory die power management [patent_app_type] => utility [patent_app_number] => 18/218434 [patent_app_country] => US [patent_app_date] => 2023-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 14613 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18218434 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/218434
Sensing and tuning for memory die power management Jul 4, 2023 Issued
Array ( [id] => 20161134 [patent_doc_number] => 12387767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Method and apparatus for quantization and dequantization of neural network input and output data using processing-in-memory [patent_app_type] => utility [patent_app_number] => 18/346110 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3600 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18346110 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/346110
Method and apparatus for quantization and dequantization of neural network input and output data using processing-in-memory Jun 29, 2023 Issued
Array ( [id] => 19980034 [patent_doc_number] => 12347520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Computing-in-memory device including digital-to-analog converter based on memory structure [patent_app_type] => utility [patent_app_number] => 18/342013 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 1122 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18342013 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/342013
Computing-in-memory device including digital-to-analog converter based on memory structure Jun 26, 2023 Issued
Array ( [id] => 20404263 [patent_doc_number] => 12494243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-09 [patent_title] => Memory device, memory system including memory device, and method of operating memory device [patent_app_type] => utility [patent_app_number] => 18/213826 [patent_app_country] => US [patent_app_date] => 2023-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 2347 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18213826 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/213826
Memory device, memory system including memory device, and method of operating memory device Jun 23, 2023 Issued
Array ( [id] => 19875126 [patent_doc_number] => 12268012 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Multi-output look-up table (LUT) for use in coarse-grained field-programmable-gate-array (FPGA) integrated-circuit (IC) chip [patent_app_type] => utility [patent_app_number] => 18/213237 [patent_app_country] => US [patent_app_date] => 2023-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 80 [patent_no_of_words] => 172270 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18213237 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/213237
Multi-output look-up table (LUT) for use in coarse-grained field-programmable-gate-array (FPGA) integrated-circuit (IC) chip Jun 21, 2023 Issued
Array ( [id] => 19740943 [patent_doc_number] => 12217782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Current steering in reading magnetic tunnel junction [patent_app_type] => utility [patent_app_number] => 18/332674 [patent_app_country] => US [patent_app_date] => 2023-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5884 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18332674 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/332674
Current steering in reading magnetic tunnel junction Jun 8, 2023 Issued
Array ( [id] => 18974938 [patent_doc_number] => 20240055030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => STORAGE DEVICES DETECTING INTERNAL TEMPERATURE AND DEFECTS BY USING TEMPERATURE SENSORS AND METHODS OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/204972 [patent_app_country] => US [patent_app_date] => 2023-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18204972 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/204972
Storage devices detecting internal temperature and defects by using temperature sensors and methods of operating the same Jun 1, 2023 Issued
Array ( [id] => 18820761 [patent_doc_number] => 20230395102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => BIT LINE SENSE AMPLIFIER AND BIT LINE SENSING METHOD OF SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/205057 [patent_app_country] => US [patent_app_date] => 2023-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18205057 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/205057
Bit line sense amplifier and bit line sensing method of semiconductor memory device Jun 1, 2023 Issued
Array ( [id] => 20345836 [patent_doc_number] => 12469571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Method of operating a controller and a memory device related to recovering data [patent_app_type] => utility [patent_app_number] => 18/327759 [patent_app_country] => US [patent_app_date] => 2023-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 3325 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18327759 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/327759
Method of operating a controller and a memory device related to recovering data May 31, 2023 Issued
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