Search

Stephanie R. Berry

Examiner (ID: 47, Phone: (571)270-1662 , Office: P/3727 )

Most Active Art Unit
3727
Art Unit(s)
3723, 3727
Total Applications
481
Issued Applications
240
Pending Applications
2
Abandoned Applications
238

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10432262 [patent_doc_number] => 20150317274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-05 [patent_title] => 'IMPLEMENTING COHERENT ACCELERATOR FUNCTION ISOLATION FOR VIRTUALIZATION' [patent_app_type] => utility [patent_app_number] => 14/269338 [patent_app_country] => US [patent_app_date] => 2014-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4889 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14269338 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/269338
Implementing coherent accelerator function isolation for virtualization May 4, 2014 Issued
Array ( [id] => 11752397 [patent_doc_number] => 09710409 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-18 [patent_title] => 'Interrupt control apparatus and interrupt control method' [patent_app_type] => utility [patent_app_number] => 14/267982 [patent_app_country] => US [patent_app_date] => 2014-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 4332 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14267982 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/267982
Interrupt control apparatus and interrupt control method May 1, 2014 Issued
Array ( [id] => 10432251 [patent_doc_number] => 20150317263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-05 [patent_title] => 'SYSTEMS AND METHODS FOR CONTROLLING A MEMORY PERFORMANCE POINT' [patent_app_type] => utility [patent_app_number] => 14/266274 [patent_app_country] => US [patent_app_date] => 2014-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2876 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14266274 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/266274
SYSTEMS AND METHODS FOR CONTROLLING A MEMORY PERFORMANCE POINT Apr 29, 2014 Abandoned
Array ( [id] => 10393129 [patent_doc_number] => 20150278136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'OLDEST LINK FIRST ARBITRATION BETWEEN LINKS GROUPED AS SINGLE ARBITRATION ELEMENTS' [patent_app_type] => utility [patent_app_number] => 14/252441 [patent_app_country] => US [patent_app_date] => 2014-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12709 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14252441 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/252441
Oldest link first arbitration between links grouped as single arbitration elements Apr 13, 2014 Issued
Array ( [id] => 11488639 [patent_doc_number] => 09594709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'Time and event based message transmission' [patent_app_type] => utility [patent_app_number] => 14/246314 [patent_app_country] => US [patent_app_date] => 2014-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8378 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14246314 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/246314
Time and event based message transmission Apr 6, 2014 Issued
Array ( [id] => 14364639 [patent_doc_number] => 10303625 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => Variable read latency on a serial memory bus [patent_app_type] => utility [patent_app_number] => 14/228384 [patent_app_country] => US [patent_app_date] => 2014-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8933 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14228384 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/228384
Variable read latency on a serial memory bus Mar 27, 2014 Issued
Array ( [id] => 10393128 [patent_doc_number] => 20150278135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'OLDEST LINK FIRST ARBITRATION BETWEEN LINKS GROUPED AS SINGLE ARBITRATION ELEMENTS' [patent_app_type] => utility [patent_app_number] => 14/225781 [patent_app_country] => US [patent_app_date] => 2014-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12696 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14225781 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/225781
Oldest link first arbitration between links grouped as single arbitration elements Mar 25, 2014 Issued
Array ( [id] => 11724307 [patent_doc_number] => 09697161 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-04 [patent_title] => 'Method of handling transactions, corresponding system and computer program product' [patent_app_type] => utility [patent_app_number] => 14/219850 [patent_app_country] => US [patent_app_date] => 2014-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5162 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14219850 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/219850
Method of handling transactions, corresponding system and computer program product Mar 18, 2014 Issued
Array ( [id] => 10384106 [patent_doc_number] => 20150269112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-24 [patent_title] => 'RECONFIGURABLE TRANSMITTER' [patent_app_type] => utility [patent_app_number] => 14/218684 [patent_app_country] => US [patent_app_date] => 2014-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14218684 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/218684
Reconfigurable transmitter Mar 17, 2014 Issued
Array ( [id] => 11226775 [patent_doc_number] => 09454498 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-27 [patent_title] => 'Integrated circuit with programmable circuitry and an embedded processor system' [patent_app_type] => utility [patent_app_number] => 14/194498 [patent_app_country] => US [patent_app_date] => 2014-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 19593 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14194498 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/194498
Integrated circuit with programmable circuitry and an embedded processor system Feb 27, 2014 Issued
Array ( [id] => 11345345 [patent_doc_number] => 09529751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-27 [patent_title] => 'Requests and data handling in a bus architecture' [patent_app_type] => utility [patent_app_number] => 14/153168 [patent_app_country] => US [patent_app_date] => 2014-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 12959 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14153168 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/153168
Requests and data handling in a bus architecture Jan 12, 2014 Issued
Array ( [id] => 11780863 [patent_doc_number] => 09390046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-12 [patent_title] => 'Controlling a physical link of a first protocol using an extended capability structure of a second protocol' [patent_app_type] => utility [patent_app_number] => 14/132610 [patent_app_country] => US [patent_app_date] => 2013-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 18477 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14132610 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/132610
Controlling a physical link of a first protocol using an extended capability structure of a second protocol Dec 17, 2013 Issued
Array ( [id] => 9372353 [patent_doc_number] => 20140082226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'BRIDGE BETWEEN TWO DIFFERENT CONTROLLERS FOR TRANSFERRING DATA BETWEEN HOST AND STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/090182 [patent_app_country] => US [patent_app_date] => 2013-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4317 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14090182 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/090182
Bridge between two different controllers for transferring data between host and storage device Nov 25, 2013 Issued
Array ( [id] => 9372378 [patent_doc_number] => 20140082251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'PCI EXPRESS DEVICE AND LINK ENERGY MANAGEMENT METHOD AND DEVICE' [patent_app_type] => utility [patent_app_number] => 14/083826 [patent_app_country] => US [patent_app_date] => 2013-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8942 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14083826 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/083826
PCI express device and link energy management method and device Nov 18, 2013 Issued
Array ( [id] => 9479279 [patent_doc_number] => 20140136742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'COMMUNICATION SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/078681 [patent_app_country] => US [patent_app_date] => 2013-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10896 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14078681 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/078681
COMMUNICATION SYSTEM Nov 12, 2013 Abandoned
Array ( [id] => 9332774 [patent_doc_number] => 20140059556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'ENVIRONMENT BASED NODE SELECTION FOR WORK SCHEDULING IN A PARALLEL COMPUTING SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/067694 [patent_app_country] => US [patent_app_date] => 2013-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11386 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14067694 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/067694
Environment based node selection for work scheduling in a parallel computing system Oct 29, 2013 Issued
Array ( [id] => 9933883 [patent_doc_number] => 20150082075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'TECHNIQUE FOR SCALING THE BANDWIDTH OF A PROCESSING ELEMENT TO MATCH THE BANDWIDTH OF AN INTERCONNECT' [patent_app_type] => utility [patent_app_number] => 14/031803 [patent_app_country] => US [patent_app_date] => 2013-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11056 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14031803 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/031803
Technique for scaling the bandwidth of a processing element to match the bandwidth of an interconnect Sep 18, 2013 Issued
Array ( [id] => 11563730 [patent_doc_number] => 09626320 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Technique for scaling the bandwidth of a processing element to match the bandwidth of an interconnect' [patent_app_type] => utility [patent_app_number] => 14/031776 [patent_app_country] => US [patent_app_date] => 2013-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11027 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14031776 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/031776
Technique for scaling the bandwidth of a processing element to match the bandwidth of an interconnect Sep 18, 2013 Issued
Array ( [id] => 9933871 [patent_doc_number] => 20150082063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'BASEBOARD MANAGEMENT CONTROLLER STATE TRANSITIONS' [patent_app_type] => utility [patent_app_number] => 14/030527 [patent_app_country] => US [patent_app_date] => 2013-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11087 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14030527 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/030527
BASEBOARD MANAGEMENT CONTROLLER STATE TRANSITIONS Sep 17, 2013 Abandoned
Array ( [id] => 9933749 [patent_doc_number] => 20150081941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'SHARED RECEIVE QUEUE ALLOCATION FOR NETWORK ON A CHIP COMMUNICATION' [patent_app_type] => utility [patent_app_number] => 14/030754 [patent_app_country] => US [patent_app_date] => 2013-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10245 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14030754 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/030754
Shared receive queue allocation for network on a chip communication Sep 17, 2013 Issued
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