Search

Stephen C. Elmore

Examiner (ID: 18626, Phone: (571)272-4436 , Office: P/2133 )

Most Active Art Unit
2185
Art Unit(s)
2186, 2133, 2413, 2131, 2188, 2313, 2785, 2185, 2138
Total Applications
1200
Issued Applications
1101
Pending Applications
30
Abandoned Applications
72

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11423460 [patent_doc_number] => 20170031604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-02 [patent_title] => 'SSD WITH NON-BLOCKING FLUSH COMMAND' [patent_app_type] => utility [patent_app_number] => 15/075157 [patent_app_country] => US [patent_app_date] => 2016-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3457 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15075157 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/075157
SSD with non-blocking flush command Mar 19, 2016 Issued
Array ( [id] => 11860921 [patent_doc_number] => 09740604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-22 [patent_title] => 'Method for allocating storage space using buddy allocator' [patent_app_type] => utility [patent_app_number] => 15/073875 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5895 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15073875 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/073875
Method for allocating storage space using buddy allocator Mar 17, 2016 Issued
Array ( [id] => 12046253 [patent_doc_number] => 09823854 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-21 [patent_title] => 'Priority-based access of compressed memory lines in memory in a processor-based system' [patent_app_type] => utility [patent_app_number] => 15/074444 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11575 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15074444 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/074444
Priority-based access of compressed memory lines in memory in a processor-based system Mar 17, 2016 Issued
Array ( [id] => 11846310 [patent_doc_number] => 09733862 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-15 [patent_title] => 'Systems and methods for reverse point-in-time copy management in a storage system' [patent_app_type] => utility [patent_app_number] => 15/074520 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 8001 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15074520 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/074520
Systems and methods for reverse point-in-time copy management in a storage system Mar 17, 2016 Issued
Array ( [id] => 12088321 [patent_doc_number] => 09842051 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-12-12 [patent_title] => 'Managing aliasing in a virtually indexed physically tagged cache' [patent_app_type] => utility [patent_app_number] => 15/074764 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 8938 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15074764 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/074764
Managing aliasing in a virtually indexed physically tagged cache Mar 17, 2016 Issued
Array ( [id] => 10999263 [patent_doc_number] => 20160196210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-07 [patent_title] => 'CACHE MEMORY SYSTEM AND PROCESSOR SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/069409 [patent_app_country] => US [patent_app_date] => 2016-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6353 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15069409 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/069409
Cache memory system and processor system Mar 13, 2016 Issued
Array ( [id] => 11193493 [patent_doc_number] => 09424308 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-23 [patent_title] => 'Hierarchical in-memory sort engine' [patent_app_type] => utility [patent_app_number] => 15/063315 [patent_app_country] => US [patent_app_date] => 2016-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 10382 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 381 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15063315 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/063315
Hierarchical in-memory sort engine Mar 6, 2016 Issued
Array ( [id] => 11410776 [patent_doc_number] => 09558081 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-31 [patent_title] => 'Hypervisor assisted virtual memory obfuscation' [patent_app_type] => utility [patent_app_number] => 15/012740 [patent_app_country] => US [patent_app_date] => 2016-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11439 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15012740 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/012740
Hypervisor assisted virtual memory obfuscation Jan 31, 2016 Issued
Array ( [id] => 11078052 [patent_doc_number] => 20160275015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'Computing architecture with peripherals' [patent_app_type] => utility [patent_app_number] => 14/997487 [patent_app_country] => US [patent_app_date] => 2016-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 24300 [patent_no_of_claims] => 85 [patent_no_of_ind_claims] => 57 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14997487 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/997487
Computing architecture with peripherals Jan 15, 2016 Abandoned
Array ( [id] => 11102744 [patent_doc_number] => 20160299714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-13 [patent_title] => 'Computing architecture with peripherals' [patent_app_type] => utility [patent_app_number] => 14/997501 [patent_app_country] => US [patent_app_date] => 2016-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 24278 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14997501 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/997501
Computing architecture with peripherals Jan 15, 2016 Abandoned
Array ( [id] => 11810881 [patent_doc_number] => 09715451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-25 [patent_title] => 'System and method for caching service results in a distributed caching system in a transactional processing environment' [patent_app_type] => utility [patent_app_number] => 14/997349 [patent_app_country] => US [patent_app_date] => 2016-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9365 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14997349 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/997349
System and method for caching service results in a distributed caching system in a transactional processing environment Jan 14, 2016 Issued
Array ( [id] => 10786274 [patent_doc_number] => 20160132430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'Memory Control Circuit and Processor' [patent_app_type] => utility [patent_app_number] => 14/994900 [patent_app_country] => US [patent_app_date] => 2016-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7833 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14994900 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/994900
Memory control circuit and processor Jan 12, 2016 Issued
Array ( [id] => 11716850 [patent_doc_number] => 20170185350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'Solid state drive with holding file for atomic updates' [patent_app_type] => utility [patent_app_number] => 14/757468 [patent_app_country] => US [patent_app_date] => 2015-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6620 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14757468 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/757468
Solid state drive with holding file for atomic updates Dec 22, 2015 Issued
Array ( [id] => 10763949 [patent_doc_number] => 20160110104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-21 [patent_title] => 'APPARATUS AND METHOD FOR ROUTING INFORMATION IN A NON-VOLATILE MEMORY-BASED STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/961184 [patent_app_country] => US [patent_app_date] => 2015-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 17478 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14961184 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/961184
Apparatus and method for routing information in a non-volatile memory-based storage device Dec 6, 2015 Issued
Array ( [id] => 10639492 [patent_doc_number] => 09357010 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-05-31 [patent_title] => 'Storage system architecture' [patent_app_type] => utility [patent_app_number] => 14/961665 [patent_app_country] => US [patent_app_date] => 2015-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 12799 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14961665 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/961665
Storage system architecture Dec 6, 2015 Issued
Array ( [id] => 10739551 [patent_doc_number] => 20160085702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'HIERARCHICAL IN-MEMORY SORT ENGINE' [patent_app_type] => utility [patent_app_number] => 14/959050 [patent_app_country] => US [patent_app_date] => 2015-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10384 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14959050 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/959050
Hierarchical in-memory sort engine Dec 3, 2015 Issued
Array ( [id] => 10739477 [patent_doc_number] => 20160085628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'STORAGE CLUSTER' [patent_app_type] => utility [patent_app_number] => 14/954757 [patent_app_country] => US [patent_app_date] => 2015-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9672 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14954757 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/954757
Storage cluster Nov 29, 2015 Issued
Array ( [id] => 12310998 [patent_doc_number] => 09940043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-10 [patent_title] => Systems and methods for performing storage operations in a computer network [patent_app_type] => utility [patent_app_number] => 14/925554 [patent_app_country] => US [patent_app_date] => 2015-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14925554 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/925554
Systems and methods for performing storage operations in a computer network Oct 27, 2015 Issued
Array ( [id] => 12100904 [patent_doc_number] => 09857998 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-02 [patent_title] => 'Backup storage of vital debug information' [patent_app_type] => utility [patent_app_number] => 14/920913 [patent_app_country] => US [patent_app_date] => 2015-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6031 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14920913 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/920913
Backup storage of vital debug information Oct 22, 2015 Issued
Array ( [id] => 11680153 [patent_doc_number] => 09678682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-13 [patent_title] => 'Backup storage of vital debug information' [patent_app_type] => utility [patent_app_number] => 14/881305 [patent_app_country] => US [patent_app_date] => 2015-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6031 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14881305 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/881305
Backup storage of vital debug information Oct 12, 2015 Issued
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