Search

Stephen C. Pellegrino

Examiner (ID: 6808)

Most Active Art Unit
3306
Art Unit(s)
2899, 3305, 3734, 3306, 3309
Total Applications
1087
Issued Applications
982
Pending Applications
0
Abandoned Applications
105

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12918238 [patent_doc_number] => 20180197922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-12 [patent_title] => DISPLAY DEVICE COLOR FILTER PATTERNS AND A BLACK MATRIX [patent_app_type] => utility [patent_app_number] => 15/865481 [patent_app_country] => US [patent_app_date] => 2018-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15865481 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/865481
Display device color filter patterns and a black matrix Jan 8, 2018 Issued
Array ( [id] => 14955431 [patent_doc_number] => 10438995 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-08 [patent_title] => Devices including magnetic tunnel junctions integrated with selectors [patent_app_type] => utility [patent_app_number] => 15/865249 [patent_app_country] => US [patent_app_date] => 2018-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 47 [patent_no_of_words] => 14252 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15865249 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/865249
Devices including magnetic tunnel junctions integrated with selectors Jan 7, 2018 Issued
Array ( [id] => 17310443 [patent_doc_number] => 11211570 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Hole transporting material and photovoltaic device that uses it [patent_app_type] => utility [patent_app_number] => 16/466100 [patent_app_country] => US [patent_app_date] => 2017-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 11895 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16466100 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/466100
Hole transporting material and photovoltaic device that uses it Dec 21, 2017 Issued
Array ( [id] => 14827699 [patent_doc_number] => 10410863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-10 [patent_title] => Methods for integrated circuit design and fabrication [patent_app_type] => utility [patent_app_number] => 15/852129 [patent_app_country] => US [patent_app_date] => 2017-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 56 [patent_no_of_words] => 7423 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15852129 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/852129
Methods for integrated circuit design and fabrication Dec 21, 2017 Issued
Array ( [id] => 14350691 [patent_doc_number] => 20190157318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => BACK-CHANNEL-ETCHED TFT SUBSTRATE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/749105 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4328 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15749105 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/749105
Manufacturing method of back-channel-etched (BCE) thin film transistor (TFT) substrate Dec 19, 2017 Issued
Array ( [id] => 14644333 [patent_doc_number] => 10366915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-30 [patent_title] => FinFET devices with embedded air gaps and the fabrication thereof [patent_app_type] => utility [patent_app_number] => 15/847307 [patent_app_country] => US [patent_app_date] => 2017-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 6878 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15847307 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/847307
FinFET devices with embedded air gaps and the fabrication thereof Dec 18, 2017 Issued
Array ( [id] => 14525947 [patent_doc_number] => 10340244 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/847329 [patent_app_country] => US [patent_app_date] => 2017-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6676 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15847329 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/847329
Semiconductor device and manufacturing method thereof Dec 18, 2017 Issued
Array ( [id] => 14526345 [patent_doc_number] => 10340444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Semiconductor element with hall element and sealing resin [patent_app_type] => utility [patent_app_number] => 15/847532 [patent_app_country] => US [patent_app_date] => 2017-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 66 [patent_no_of_words] => 16998 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15847532 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/847532
Semiconductor element with hall element and sealing resin Dec 18, 2017 Issued
Array ( [id] => 14476315 [patent_doc_number] => 20190189806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => TIGHT PITCH STACK NANOWIRE ISOLATION [patent_app_type] => utility [patent_app_number] => 15/847296 [patent_app_country] => US [patent_app_date] => 2017-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8879 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15847296 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/847296
Tight pitch stack nanowire isolation Dec 18, 2017 Issued
Array ( [id] => 14525919 [patent_doc_number] => 10340230 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-02 [patent_title] => Semiconductor chip [patent_app_type] => utility [patent_app_number] => 15/847567 [patent_app_country] => US [patent_app_date] => 2017-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4238 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15847567 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/847567
Semiconductor chip Dec 18, 2017 Issued
Array ( [id] => 16936640 [patent_doc_number] => 20210202529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/063885 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8320 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16063885 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/063885
Array substrate, manufacturing method thereof, and display panel Dec 17, 2017 Issued
Array ( [id] => 15218565 [patent_doc_number] => 20190371969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => OPTOELECTRONIC SEMICONDUCTOR CHIP AND METHOD OF PRODUCING AN OPTOELECTRONIC SEMICONDUCTOR CHIP [patent_app_type] => utility [patent_app_number] => 16/462483 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7044 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16462483 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/462483
Optoelectronic semiconductor chip and method of producing an optoelectronic semiconductor chip Dec 17, 2017 Issued
Array ( [id] => 16609338 [patent_doc_number] => 10910353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-02 [patent_title] => White light source and method of producing a white light source [patent_app_type] => utility [patent_app_number] => 16/469728 [patent_app_country] => US [patent_app_date] => 2017-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 6313 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16469728 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/469728
White light source and method of producing a white light source Dec 13, 2017 Issued
Array ( [id] => 15030967 [patent_doc_number] => 20190326488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => LED MODULE WITH HIGH NEAR FIELD CONTRAST RATIO [patent_app_type] => utility [patent_app_number] => 16/469913 [patent_app_country] => US [patent_app_date] => 2017-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4312 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16469913 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/469913
LED module with high near field contrast ratio Dec 7, 2017 Issued
Array ( [id] => 13667019 [patent_doc_number] => 10163684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Fabrication of silicon germanium-on-insulator FinFET [patent_app_type] => utility [patent_app_number] => 15/831761 [patent_app_country] => US [patent_app_date] => 2017-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 3911 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15831761 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/831761
Fabrication of silicon germanium-on-insulator FinFET Dec 4, 2017 Issued
Array ( [id] => 12850054 [patent_doc_number] => 20180175191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => LDMOS Transistor with Segmented Gate Dielectric Layer [patent_app_type] => utility [patent_app_number] => 15/830263 [patent_app_country] => US [patent_app_date] => 2017-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3649 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15830263 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/830263
LDMOS transistor with segmented gate dielectric layer Dec 3, 2017 Issued
Array ( [id] => 13132161 [patent_doc_number] => 10084020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-25 [patent_title] => Micro display having vertically stacked structure and method of forming the same [patent_app_type] => utility [patent_app_number] => 15/826069 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5033 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826069 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/826069
Micro display having vertically stacked structure and method of forming the same Nov 28, 2017 Issued
Array ( [id] => 14920301 [patent_doc_number] => 10431477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Method of packaging chip and chip package structure [patent_app_type] => utility [patent_app_number] => 15/826261 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 32 [patent_no_of_words] => 13058 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826261 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/826261
Method of packaging chip and chip package structure Nov 28, 2017 Issued
Array ( [id] => 14151607 [patent_doc_number] => 10256193 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-09 [patent_title] => Methods and devices with enhanced grounding and shielding for wire bond structures [patent_app_type] => utility [patent_app_number] => 15/826205 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4763 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826205 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/826205
Methods and devices with enhanced grounding and shielding for wire bond structures Nov 28, 2017 Issued
Array ( [id] => 14381967 [patent_doc_number] => 20190164896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => SEMICONDUCTOR DEVICES INCLUDING COBALT ALLOYS AND FABRICATION METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 15/825833 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12039 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15825833 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/825833
Semiconductor devices including a first cobalt alloy in a first barrier layer and a second cobalt alloy in a second barrier layer Nov 28, 2017 Issued
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