Stephen C. Pellegrino

Array ( [id] => 11524549 [patent_doc_number] => 09607960 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-28 [patent_title] => 'Bonding structure and flexible device' [patent_app_type] => utility [patent_app_number] => 14/983506 [patent_app_country] => US [patent_app_date] => 2015-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 3861 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14983506 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11608233 [patent_doc_number] => 20170125537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'FINFET GATE STRUCTURE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/983422 [patent_app_country] => US [patent_app_date] => 2015-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6768 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14983422 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10765309 [patent_doc_number] => 20160111465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-21 [patent_title] => 'STRUCTURE OF DIELECTRIC GRID FOR A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/981787 [patent_app_country] => US [patent_app_date] => 2015-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4791 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14981787 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11904275 [patent_doc_number] => 09773715 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-26 [patent_title] => 'Multi-layer packaging scheme for implant electronics' [patent_app_type] => utility [patent_app_number] => 14/981432 [patent_app_country] => US [patent_app_date] => 2015-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 36 [patent_no_of_words] => 5764 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14981432 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11718316 [patent_doc_number] => 20170186815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'Dual-layer dielectric in memory device' [patent_app_type] => utility [patent_app_number] => 14/998194 [patent_app_country] => US [patent_app_date] => 2015-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7616 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14998194 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15427791 [patent_doc_number] => 10546835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => Microelectronic devices designed with efficient partitioning of high frequency communication devices integrated on a package fabric [patent_app_type] => utility [patent_app_number] => 15/777040 [patent_app_country] => US [patent_app_date] => 2015-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 6071 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15777040 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10980069 [patent_doc_number] => 20160177013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'CO-CROSSLINKER SYSTEMS FOR ENCAPSULATION FILMS COMPRISING UREA COMPOUNDS' [patent_app_type] => utility [patent_app_number] => 14/973235 [patent_app_country] => US [patent_app_date] => 2015-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8249 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14973235 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10984154 [patent_doc_number] => 20160181100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'Patterning a Substrate Using Grafting Polymer Material' [patent_app_type] => utility [patent_app_number] => 14/973346 [patent_app_country] => US [patent_app_date] => 2015-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5360 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14973346 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11259453 [patent_doc_number] => 09484358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-01 [patent_title] => 'Ultrahigh density vertical NAND memory device and method of making thereof' [patent_app_type] => utility [patent_app_number] => 14/973000 [patent_app_country] => US [patent_app_date] => 2015-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 85 [patent_no_of_words] => 17539 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14973000 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11466942 [patent_doc_number] => 09583583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-28 [patent_title] => 'Semiconductor device with nanowires in different regions at different heights' [patent_app_type] => utility [patent_app_number] => 14/969025 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 8657 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14969025 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12095655 [patent_doc_number] => 20170352748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-07 [patent_title] => 'MODULATION DEVICE COMPRISING A NANODIODE' [patent_app_type] => utility [patent_app_number] => 15/537973 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1209 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15537973 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11201178 [patent_doc_number] => 09431399 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-08-30 [patent_title] => 'Method for forming merged contact for semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/969533 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 36 [patent_no_of_words] => 4713 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14969533 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10753146 [patent_doc_number] => 20160099298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-07 [patent_title] => 'ORGANIC LIGHT-EMITTING DISPLAY APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/968380 [patent_app_country] => US [patent_app_date] => 2015-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13187 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14968380 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11187511 [patent_doc_number] => 09418921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-16 [patent_title] => 'Power module' [patent_app_type] => utility [patent_app_number] => 14/965909 [patent_app_country] => US [patent_app_date] => 2015-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 4610 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14965909 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10753201 [patent_doc_number] => 20160099353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-07 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/966177 [patent_app_country] => US [patent_app_date] => 2015-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 19844 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14966177 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10753201 [patent_doc_number] => 20160099353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-07 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/966177 [patent_app_country] => US [patent_app_date] => 2015-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 19844 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14966177 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10753201 [patent_doc_number] => 20160099353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-07 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/966177 [patent_app_country] => US [patent_app_date] => 2015-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 19844 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14966177 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10753201 [patent_doc_number] => 20160099353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-07 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/966177 [patent_app_country] => US [patent_app_date] => 2015-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 19844 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14966177 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11391734 [patent_doc_number] => 09552984 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-24 [patent_title] => 'Processing method of substrate and manufacturing method of liquid ejection head' [patent_app_type] => utility [patent_app_number] => 14/963493 [patent_app_country] => US [patent_app_date] => 2015-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 34 [patent_no_of_words] => 10002 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14963493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11807283 [patent_doc_number] => 09548367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-17 [patent_title] => 'Method of reducing the heights of source-drain sidewall spacers of FinFETs through etching and the FinFETs thereof' [patent_app_type] => utility [patent_app_number] => 14/961048 [patent_app_country] => US [patent_app_date] => 2015-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3326 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14961048 [rel_patent_id] =>[rel_patent_doc_number] =>)