Stephen D. Meier

Array ( [id] => 3820332 [patent_doc_number] => 05789767 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Compound semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/906110 [patent_app_country] => US [patent_app_date] => 1997-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 2991 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/789/05789767.pdf [firstpage_image] =>[orig_patent_app_number] => 906110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4161536 [patent_doc_number] => 06104067 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/901473 [patent_app_country] => US [patent_app_date] => 1997-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 1919 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/104/06104067.pdf [firstpage_image] =>[orig_patent_app_number] => 901473 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4009310 [patent_doc_number] => 06005261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Semiconductor device with a junction termination and a method for production thereof' [patent_app_type] => 1 [patent_app_number] => 8/898954 [patent_app_country] => US [patent_app_date] => 1997-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 7 [patent_no_of_words] => 3294 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/005/06005261.pdf [firstpage_image] =>[orig_patent_app_number] => 898954 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4161407 [patent_doc_number] => 06104058 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Method for improving the intermediate dielectric profile, particularly for non-volatile memories' [patent_app_type] => 1 [patent_app_number] => 8/898155 [patent_app_country] => US [patent_app_date] => 1997-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 3408 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/104/06104058.pdf [firstpage_image] =>[orig_patent_app_number] => 898155 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3940693 [patent_doc_number] => 05929518 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Circuit board and method' [patent_app_type] => 1 [patent_app_number] => 8/901525 [patent_app_country] => US [patent_app_date] => 1997-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3151 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/929/05929518.pdf [firstpage_image] =>[orig_patent_app_number] => 901525 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3878989 [patent_doc_number] => 05763914 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Cell topology for power transistors with increased packing density' [patent_app_type] => 1 [patent_app_number] => 8/895507 [patent_app_country] => US [patent_app_date] => 1997-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 4459 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/763/05763914.pdf [firstpage_image] =>[orig_patent_app_number] => 895507 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4070514 [patent_doc_number] => 06008520 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Trench MOSFET with heavily doped delta layer to provide low on- resistance' [patent_app_type] => 1 [patent_app_number] => 8/895497 [patent_app_country] => US [patent_app_date] => 1997-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 34 [patent_no_of_words] => 4748 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/008/06008520.pdf [firstpage_image] =>[orig_patent_app_number] => 895497 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4041862 [patent_doc_number] => 05856697 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-05 [patent_title] => 'Integrated dual layer emitter mask and emitter trench for BiCMOS processes' [patent_app_type] => 1 [patent_app_number] => 8/895270 [patent_app_country] => US [patent_app_date] => 1997-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6345 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/856/05856697.pdf [firstpage_image] =>[orig_patent_app_number] => 895270 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3909120 [patent_doc_number] => 05898205 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Enhanced ESD protection circuitry' [patent_app_type] => 1 [patent_app_number] => 8/891381 [patent_app_country] => US [patent_app_date] => 1997-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2757 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898205.pdf [firstpage_image] =>[orig_patent_app_number] => 891381 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3812622 [patent_doc_number] => 05831328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Semiconductor device and manufacturing method of the device' [patent_app_type] => 1 [patent_app_number] => 8/890683 [patent_app_country] => US [patent_app_date] => 1997-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 5481 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/831/05831328.pdf [firstpage_image] =>[orig_patent_app_number] => 890683 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4009414 [patent_doc_number] => 06005268 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Integrated circuitry, DRAM cells, capacitors, and methods of forming integrated circuitry, DRAM cells and capacitors' [patent_app_type] => 1 [patent_app_number] => 8/884925 [patent_app_country] => US [patent_app_date] => 1997-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4156 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/005/06005268.pdf [firstpage_image] =>[orig_patent_app_number] => 884925 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4054318 [patent_doc_number] => 05869884 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'Semiconductor device having lead terminal on only one side of a package' [patent_app_type] => 1 [patent_app_number] => 8/883437 [patent_app_country] => US [patent_app_date] => 1997-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1747 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/869/05869884.pdf [firstpage_image] =>[orig_patent_app_number] => 883437 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3780267 [patent_doc_number] => 05757057 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Large area avalanche photodiode array' [patent_app_type] => 1 [patent_app_number] => 8/882055 [patent_app_country] => US [patent_app_date] => 1997-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 7233 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/757/05757057.pdf [firstpage_image] =>[orig_patent_app_number] => 882055 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3943264 [patent_doc_number] => 05872373 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Dram-capacitor structure' [patent_app_type] => 1 [patent_app_number] => 8/879629 [patent_app_country] => US [patent_app_date] => 1997-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 41 [patent_no_of_words] => 13325 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872373.pdf [firstpage_image] =>[orig_patent_app_number] => 879629 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4243822 [patent_doc_number] => 06081008 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Composite trench-fin capacitors for DRAM' [patent_app_type] => 1 [patent_app_number] => 8/879341 [patent_app_country] => US [patent_app_date] => 1997-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 3451 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081008.pdf [firstpage_image] =>[orig_patent_app_number] => 879341 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4256935 [patent_doc_number] => 06207969 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Semiconductor thin film and semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/878505 [patent_app_country] => US [patent_app_date] => 1997-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 47 [patent_no_of_words] => 10478 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/207/06207969.pdf [firstpage_image] =>[orig_patent_app_number] => 878505 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4067650 [patent_doc_number] => 05895947 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-20 [patent_title] => 'Intergrated circuit memory devices including capacitors on capping layer' [patent_app_type] => 1 [patent_app_number] => 8/876870 [patent_app_country] => US [patent_app_date] => 1997-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3532 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/895/05895947.pdf [firstpage_image] =>[orig_patent_app_number] => 876870 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4030607 [patent_doc_number] => 05883410 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Edge wrap-around protective extension for covering and protecting edges of thick oxide layer' [patent_app_type] => 1 [patent_app_number] => 8/874357 [patent_app_country] => US [patent_app_date] => 1997-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 4700 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/883/05883410.pdf [firstpage_image] =>[orig_patent_app_number] => 874357 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4101615 [patent_doc_number] => 06097064 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => 1 [patent_app_number] => 8/873327 [patent_app_country] => US [patent_app_date] => 1997-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 82 [patent_no_of_words] => 18991 [patent_no_of_claims] => 83 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/097/06097064.pdf [firstpage_image] =>[orig_patent_app_number] => 873327 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4054155 [patent_doc_number] => 05869875 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'Lateral diffused MOS transistor with trench source contact' [patent_app_type] => 1 [patent_app_number] => 8/872589 [patent_app_country] => US [patent_app_date] => 1997-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 1926 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/869/05869875.pdf [firstpage_image] =>[orig_patent_app_number] => 872589 [rel_patent_id] =>[rel_patent_doc_number] =>)