Search

Stephen D. Meier

Supervisory Patent Examiner (ID: 372, Phone: (571)272-2149 , Office: P/2853 )

Most Active Art Unit
2503
Art Unit(s)
2503, 2811, 2853, 2815, 2863, 2822
Total Applications
1320
Issued Applications
965
Pending Applications
40
Abandoned Applications
315

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3984989 [patent_doc_number] => 05949120 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-07 [patent_title] => 'Semiconductor photodetector' [patent_app_type] => 1 [patent_app_number] => 8/805497 [patent_app_country] => US [patent_app_date] => 1997-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 6145 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/949/05949120.pdf [firstpage_image] =>[orig_patent_app_number] => 805497 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/805497
Semiconductor photodetector Feb 25, 1997 Issued
Array ( [id] => 4326310 [patent_doc_number] => 06331739 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-18 [patent_title] => 'Fuse in top level metal and in a step, process of making and process of trimming' [patent_app_type] => 1 [patent_app_number] => 8/804850 [patent_app_country] => US [patent_app_date] => 1997-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 22 [patent_no_of_words] => 3390 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/331/06331739.pdf [firstpage_image] =>[orig_patent_app_number] => 804850 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/804850
Fuse in top level metal and in a step, process of making and process of trimming Feb 23, 1997 Issued
Array ( [id] => 3980562 [patent_doc_number] => 05917218 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Peripheral circuits including high voltage transistors with LDD structures for nonvolatile memories' [patent_app_type] => 1 [patent_app_number] => 8/804065 [patent_app_country] => US [patent_app_date] => 1997-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 6841 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 378 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/917/05917218.pdf [firstpage_image] =>[orig_patent_app_number] => 804065 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/804065
Peripheral circuits including high voltage transistors with LDD structures for nonvolatile memories Feb 20, 1997 Issued
Array ( [id] => 3865621 [patent_doc_number] => 05796134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Memory cells with a reduced area capacitor interconnect and methods of fabrication therefor' [patent_app_type] => 1 [patent_app_number] => 8/803285 [patent_app_country] => US [patent_app_date] => 1997-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4016 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796134.pdf [firstpage_image] =>[orig_patent_app_number] => 803285 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/803285
Memory cells with a reduced area capacitor interconnect and methods of fabrication therefor Feb 19, 1997 Issued
Array ( [id] => 4094528 [patent_doc_number] => 06133592 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Compound semiconductor device and method for producing the same' [patent_app_type] => 1 [patent_app_number] => 8/802126 [patent_app_country] => US [patent_app_date] => 1997-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5908 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133592.pdf [firstpage_image] =>[orig_patent_app_number] => 802126 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/802126
Compound semiconductor device and method for producing the same Feb 18, 1997 Issued
Array ( [id] => 3836915 [patent_doc_number] => 05814862 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-29 [patent_title] => 'Metallic source line and drain plug with self-aligned contacts for flash memory device' [patent_app_type] => 1 [patent_app_number] => 8/801659 [patent_app_country] => US [patent_app_date] => 1997-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4091 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 364 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/814/05814862.pdf [firstpage_image] =>[orig_patent_app_number] => 801659 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/801659
Metallic source line and drain plug with self-aligned contacts for flash memory device Feb 17, 1997 Issued
Array ( [id] => 3812309 [patent_doc_number] => 05831307 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Silicon damage free process for double poly emitter and reverse MOS in BICMOS application' [patent_app_type] => 1 [patent_app_number] => 8/802178 [patent_app_country] => US [patent_app_date] => 1997-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3236 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/831/05831307.pdf [firstpage_image] =>[orig_patent_app_number] => 802178 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/802178
Silicon damage free process for double poly emitter and reverse MOS in BICMOS application Feb 14, 1997 Issued
Array ( [id] => 4031578 [patent_doc_number] => 05903032 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-11 [patent_title] => 'Power device integration for built-in ESD robustness' [patent_app_type] => 1 [patent_app_number] => 8/798445 [patent_app_country] => US [patent_app_date] => 1997-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 3170 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/903/05903032.pdf [firstpage_image] =>[orig_patent_app_number] => 798445 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/798445
Power device integration for built-in ESD robustness Feb 9, 1997 Issued
Array ( [id] => 3812421 [patent_doc_number] => 05831315 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Highly integrated low voltage SRAM array with low resistance Vss lines' [patent_app_type] => 1 [patent_app_number] => 8/795062 [patent_app_country] => US [patent_app_date] => 1997-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4186 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/831/05831315.pdf [firstpage_image] =>[orig_patent_app_number] => 795062 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/795062
Highly integrated low voltage SRAM array with low resistance Vss lines Feb 4, 1997 Issued
Array ( [id] => 4009859 [patent_doc_number] => 05859444 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/795207 [patent_app_country] => US [patent_app_date] => 1997-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 55 [patent_no_of_words] => 6208 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/859/05859444.pdf [firstpage_image] =>[orig_patent_app_number] => 795207 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/795207
Semiconductor device Feb 4, 1997 Issued
Array ( [id] => 3980463 [patent_doc_number] => 05905286 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/794504 [patent_app_country] => US [patent_app_date] => 1997-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 108 [patent_figures_cnt] => 219 [patent_no_of_words] => 29825 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/905/05905286.pdf [firstpage_image] =>[orig_patent_app_number] => 794504 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/794504
Semiconductor device Feb 3, 1997 Issued
08/806042 METHOD OF MAKING TRIPLE-WELL NON-VOLATILE SEMICONDUCTOR MEMORY ARRAYS Jan 31, 1997 Abandoned
Array ( [id] => 4120115 [patent_doc_number] => 06046494 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'High tensile nitride layer' [patent_app_type] => 1 [patent_app_number] => 8/791867 [patent_app_country] => US [patent_app_date] => 1997-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 6011 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/046/06046494.pdf [firstpage_image] =>[orig_patent_app_number] => 791867 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/791867
High tensile nitride layer Jan 30, 1997 Issued
Array ( [id] => 3882501 [patent_doc_number] => 05747850 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'Extended drain resurf lateral DMOS devices' [patent_app_type] => 1 [patent_app_number] => 8/790124 [patent_app_country] => US [patent_app_date] => 1997-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 4895 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/747/05747850.pdf [firstpage_image] =>[orig_patent_app_number] => 790124 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/790124
Extended drain resurf lateral DMOS devices Jan 28, 1997 Issued
Array ( [id] => 4401293 [patent_doc_number] => 06297532 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/787332 [patent_app_country] => US [patent_app_date] => 1997-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 31 [patent_no_of_words] => 10902 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/297/06297532.pdf [firstpage_image] =>[orig_patent_app_number] => 787332 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/787332
Semiconductor device and method of manufacturing the same Jan 26, 1997 Issued
Array ( [id] => 3661995 [patent_doc_number] => 05659192 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-19 [patent_title] => 'SOI substrate fabrication' [patent_app_type] => 1 [patent_app_number] => 8/791354 [patent_app_country] => US [patent_app_date] => 1997-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2485 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/659/05659192.pdf [firstpage_image] =>[orig_patent_app_number] => 791354 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/791354
SOI substrate fabrication Jan 26, 1997 Issued
Array ( [id] => 4062227 [patent_doc_number] => 05864166 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-26 [patent_title] => 'Bistable photoconductive switches particularly suited for frequency-agile, radio-frequency sources' [patent_app_type] => 1 [patent_app_number] => 8/788631 [patent_app_country] => US [patent_app_date] => 1997-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 10139 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 382 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/864/05864166.pdf [firstpage_image] =>[orig_patent_app_number] => 788631 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/788631
Bistable photoconductive switches particularly suited for frequency-agile, radio-frequency sources Jan 23, 1997 Issued
Array ( [id] => 3892788 [patent_doc_number] => 05723879 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'Thin film transistor with vertical channel adjacent sidewall of gate electrode and method of making' [patent_app_type] => 1 [patent_app_number] => 8/788204 [patent_app_country] => US [patent_app_date] => 1997-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 2660 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/723/05723879.pdf [firstpage_image] =>[orig_patent_app_number] => 788204 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/788204
Thin film transistor with vertical channel adjacent sidewall of gate electrode and method of making Jan 23, 1997 Issued
Array ( [id] => 3880291 [patent_doc_number] => 05825079 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Semiconductor diodes having low forward conduction voltage drop and low reverse current leakage' [patent_app_type] => 1 [patent_app_number] => 8/787627 [patent_app_country] => US [patent_app_date] => 1997-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 31 [patent_no_of_words] => 5047 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/825/05825079.pdf [firstpage_image] =>[orig_patent_app_number] => 787627 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/787627
Semiconductor diodes having low forward conduction voltage drop and low reverse current leakage Jan 22, 1997 Issued
Array ( [id] => 4048837 [patent_doc_number] => 05874760 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-23 [patent_title] => '4F-square memory cell having vertical floating-gate transistors with self-aligned shallow trench isolation' [patent_app_type] => 1 [patent_app_number] => 8/787419 [patent_app_country] => US [patent_app_date] => 1997-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 72 [patent_no_of_words] => 20284 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/874/05874760.pdf [firstpage_image] =>[orig_patent_app_number] => 787419 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/787419
4F-square memory cell having vertical floating-gate transistors with self-aligned shallow trench isolation Jan 21, 1997 Issued
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