Search

Stephen Edward Rieth

Examiner (ID: 12834, Phone: (571)272-6274 , Office: P/1764 )

Most Active Art Unit
1764
Art Unit(s)
1764, 1759
Total Applications
647
Issued Applications
250
Pending Applications
68
Abandoned Applications
329

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18688511 [patent_doc_number] => 11784257 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying width [patent_app_type] => utility [patent_app_number] => 17/475196 [patent_app_country] => US [patent_app_date] => 2021-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 7011 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17475196 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/475196
Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying width Sep 13, 2021 Issued
Array ( [id] => 18228820 [patent_doc_number] => 20230067814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => METHODS OF FORMING MICROELECTRONIC DEVICES INCLUDING TIERED STACKS INCLUDING CONDUCTIVE STRUCTURES ISOLATED BY SLOT STRUCTURES, AND RELATED MICROELECTRONIC DEVICES AND ELECTRONIC SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/447505 [patent_app_country] => US [patent_app_date] => 2021-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21365 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447505 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/447505
METHODS OF FORMING MICROELECTRONIC DEVICES INCLUDING TIERED STACKS INCLUDING CONDUCTIVE STRUCTURES ISOLATED BY SLOT STRUCTURES, AND RELATED MICROELECTRONIC DEVICES AND ELECTRONIC SYSTEMS Sep 12, 2021 Pending
Array ( [id] => 17477694 [patent_doc_number] => 20220085198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/470134 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470134 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/470134
Semiconductor device Sep 8, 2021 Issued
Array ( [id] => 18237520 [patent_doc_number] => 20230069830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => METAL-INSULATOR-METAL CAPACITOR (MIMCAP) AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/467477 [patent_app_country] => US [patent_app_date] => 2021-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6248 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17467477 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/467477
Metal-insulator-metal capacitor (MIMCAP) and methods of forming the same Sep 6, 2021 Issued
Array ( [id] => 18241061 [patent_doc_number] => 20230073372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => MICROELECTRONIC DEVICES INCLUDING STAIRCASE STRUCTURES, AND RELATED MEMORY DEVICES, ELECTRONIC SYSTEMS, AND METHODS [patent_app_type] => utility [patent_app_number] => 17/446868 [patent_app_country] => US [patent_app_date] => 2021-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22275 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446868 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446868
MICROELECTRONIC DEVICES INCLUDING STAIRCASE STRUCTURES, AND RELATED MEMORY DEVICES, ELECTRONIC SYSTEMS, AND METHODS Sep 2, 2021 Pending
Array ( [id] => 18228992 [patent_doc_number] => 20230067986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => SINGLE-PHOTON AVALANCHE DIODE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/446577 [patent_app_country] => US [patent_app_date] => 2021-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9126 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446577 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446577
SINGLE-PHOTON AVALANCHE DIODE SEMICONDUCTOR DEVICE Aug 30, 2021 Pending
Array ( [id] => 17764903 [patent_doc_number] => 20220238516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => POLYSILICON RESISTOR USING REDUCED GRAIN SIZE POLYSILICON [patent_app_type] => utility [patent_app_number] => 17/463252 [patent_app_country] => US [patent_app_date] => 2021-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3776 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17463252 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/463252
Polysilicon resistor using reduced grain size polysilicon Aug 30, 2021 Issued
Array ( [id] => 17217703 [patent_doc_number] => 20210351041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/379431 [patent_app_country] => US [patent_app_date] => 2021-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8637 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17379431 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/379431
Method of manufacturing semiconductor devices and semiconductor devices Jul 18, 2021 Issued
Array ( [id] => 18481149 [patent_doc_number] => 11694901 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Field-effect transistor and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/371142 [patent_app_country] => US [patent_app_date] => 2021-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 11370 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17371142 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/371142
Field-effect transistor and method for manufacturing the same Jul 8, 2021 Issued
Array ( [id] => 19260936 [patent_doc_number] => 12021001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Semiconductor module and manufacturing method of semiconductor module [patent_app_type] => utility [patent_app_number] => 17/365279 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 7775 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17365279 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/365279
Semiconductor module and manufacturing method of semiconductor module Jun 30, 2021 Issued
Array ( [id] => 18039983 [patent_doc_number] => 20220384200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => METHOD OF CUTTING FIN [patent_app_type] => utility [patent_app_number] => 17/359669 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17359669 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/359669
Method of cutting fin Jun 27, 2021 Issued
Array ( [id] => 17886673 [patent_doc_number] => 20220302151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICES AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/352244 [patent_app_country] => US [patent_app_date] => 2021-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17761 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352244 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/352244
THREE-DIMENSIONAL MEMORY DEVICES AND METHODS FOR FORMING THE SAME Jun 17, 2021 Pending
Array ( [id] => 18081211 [patent_doc_number] => 20220406823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => IMAGE SENSOR WITH PHOTOSENSITIVITY ENHANCEMENT REGION [patent_app_type] => utility [patent_app_number] => 17/349202 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6355 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17349202 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/349202
Image sensor with photosensitivity enhancement region Jun 15, 2021 Issued
Array ( [id] => 17100145 [patent_doc_number] => 20210287936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => METHOD FOR FILLING RECESSED FEATURES IN SEMICONDUCTOR DEVICES WITH A LOW-RESISTIVITY METAL [patent_app_type] => utility [patent_app_number] => 17/334389 [patent_app_country] => US [patent_app_date] => 2021-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17334389 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/334389
Method for filling recessed features in semiconductor devices with a low-resistivity metal May 27, 2021 Issued
Array ( [id] => 18040150 [patent_doc_number] => 20220384367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => MRAM-BASED CHIP IDENTIFICATION WITH FREE RANDOM PROGRAMMING [patent_app_type] => utility [patent_app_number] => 17/329824 [patent_app_country] => US [patent_app_date] => 2021-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7340 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17329824 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/329824
MRAM-BASED CHIP IDENTIFICATION WITH FREE RANDOM PROGRAMMING May 24, 2021 Pending
Array ( [id] => 17085687 [patent_doc_number] => 20210280694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => Liner for A Bi-Layer Gate Helmet and the Fabrication Thereof [patent_app_type] => utility [patent_app_number] => 17/322267 [patent_app_country] => US [patent_app_date] => 2021-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17322267 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/322267
Liner for a bi-layer gate helmet and the fabrication thereof May 16, 2021 Issued
Array ( [id] => 19376803 [patent_doc_number] => 12068384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/315680 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 6447 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315680 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315680
Semiconductor device May 9, 2021 Issued
Array ( [id] => 18840167 [patent_doc_number] => 11848246 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Integrated circuit package and method [patent_app_type] => utility [patent_app_number] => 17/314618 [patent_app_country] => US [patent_app_date] => 2021-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 12625 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17314618 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/314618
Integrated circuit package and method May 6, 2021 Issued
Array ( [id] => 19244581 [patent_doc_number] => 12015036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => High temporal resolution solid-state X-ray detection system [patent_app_type] => utility [patent_app_number] => 17/241594 [patent_app_country] => US [patent_app_date] => 2021-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 6496 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17241594 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/241594
High temporal resolution solid-state X-ray detection system Apr 26, 2021 Issued
Array ( [id] => 17189110 [patent_doc_number] => 20210335995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => CRYSTALLINE MULTILAYER STRUCTURE, SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING CRYSTALLINE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/239931 [patent_app_country] => US [patent_app_date] => 2021-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8947 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17239931 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/239931
Crystalline multilayer structure, semiconductor device, and method of manufacturing crystalline structure Apr 25, 2021 Issued
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