Search

Stephen Gucker

Examiner (ID: 5682)

Most Active Art Unit
1649
Art Unit(s)
1646, 1812, 1818, 1649, 1645, 1647
Total Applications
799
Issued Applications
370
Pending Applications
114
Abandoned Applications
315

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18911933 [patent_doc_number] => 11874911 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-16 [patent_title] => Privacy preserving face-based authentication [patent_app_type] => utility [patent_app_number] => 18/050561 [patent_app_country] => US [patent_app_date] => 2022-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 17197 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18050561 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/050561
Privacy preserving face-based authentication Oct 27, 2022 Issued
Array ( [id] => 18812197 [patent_doc_number] => 20230386534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => METHODS OF OPERATING A NEAR MEMORY PROCESSING-DUAL IN-LINE MEMORY MODULE (NMP-DIMM) FOR PERFORMING A READ OPERATION AND AN ADAPTIVE LATENCY MODULE AND A SYSTEM THEREOF [patent_app_type] => utility [patent_app_number] => 17/974940 [patent_app_country] => US [patent_app_date] => 2022-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9030 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17974940 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/974940
Methods of operating a near memory processing-dual in-line memory module (NMP-DIMM) for performing a read operation and an adaptive latency module and a system thereof Oct 26, 2022 Issued
Array ( [id] => 18366767 [patent_doc_number] => 20230148359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => SENSING SCHEME FOR A MEMORY WITH SHARED SENSE COMPONENTS [patent_app_type] => utility [patent_app_number] => 18/048738 [patent_app_country] => US [patent_app_date] => 2022-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13527 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18048738 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/048738
Sensing scheme for a memory with shared sense components Oct 20, 2022 Issued
Array ( [id] => 19552757 [patent_doc_number] => 12136468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => Calibration methods and structures for partitioned memory architecture with single resistor or dual resistor memory elements [patent_app_type] => utility [patent_app_number] => 18/045529 [patent_app_country] => US [patent_app_date] => 2022-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 32 [patent_no_of_words] => 16302 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18045529 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/045529
Calibration methods and structures for partitioned memory architecture with single resistor or dual resistor memory elements Oct 10, 2022 Issued
Array ( [id] => 19733585 [patent_doc_number] => 12211585 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Partitioned memory architecture with single resistor memory elements for in-memory serial processing [patent_app_type] => utility [patent_app_number] => 18/045520 [patent_app_country] => US [patent_app_date] => 2022-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 43 [patent_no_of_words] => 12115 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18045520 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/045520
Partitioned memory architecture with single resistor memory elements for in-memory serial processing Oct 10, 2022 Issued
Array ( [id] => 19094752 [patent_doc_number] => 11956225 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Web browser-based device communication workflow [patent_app_type] => utility [patent_app_number] => 17/962747 [patent_app_country] => US [patent_app_date] => 2022-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7360 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17962747 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/962747
Web browser-based device communication workflow Oct 9, 2022 Issued
Array ( [id] => 19583372 [patent_doc_number] => 12149508 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Data sharing between tenants at different network platforms [patent_app_type] => utility [patent_app_number] => 17/938514 [patent_app_country] => US [patent_app_date] => 2022-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6426 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17938514 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/938514
Data sharing between tenants at different network platforms Oct 5, 2022 Issued
Array ( [id] => 19131852 [patent_doc_number] => 20240137205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => EFFICIENT RANDOM MASKING OF VALUES WHILE MAINTAINING THEIR SIGN UNDER FULLY HOMOMORPHIC ENCRYPTION (FHE) [patent_app_type] => utility [patent_app_number] => 17/960956 [patent_app_country] => US [patent_app_date] => 2022-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17960956 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/960956
Efficient random masking of values while maintaining their sign under fully homomorphic encryption (FHE) Oct 5, 2022 Issued
Array ( [id] => 18339113 [patent_doc_number] => 20230131062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => STORAGE DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/958811 [patent_app_country] => US [patent_app_date] => 2022-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17958811 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/958811
Storage device for reducing or preventing successful attacks by malicious users and operating method thereof Oct 2, 2022 Issued
Array ( [id] => 18615528 [patent_doc_number] => 20230282265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => REFRESH CIRCUIT, MEMORY, AND REFRESH METHOD [patent_app_type] => utility [patent_app_number] => 17/937120 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7229 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17937120 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/937120
Refresh circuit, memory, and refresh method Sep 29, 2022 Issued
Array ( [id] => 19507634 [patent_doc_number] => 12119063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Memory device and operation method thereof [patent_app_type] => utility [patent_app_number] => 17/957532 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 31 [patent_no_of_words] => 16912 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17957532 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/957532
Memory device and operation method thereof Sep 29, 2022 Issued
Array ( [id] => 18365068 [patent_doc_number] => 20230146659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/955978 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955978 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955978
Memory device Sep 28, 2022 Issued
Array ( [id] => 19507645 [patent_doc_number] => 12119074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Data correction of redundant data storage [patent_app_type] => utility [patent_app_number] => 17/955439 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 10813 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955439 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955439
Data correction of redundant data storage Sep 27, 2022 Issued
Array ( [id] => 18144849 [patent_doc_number] => 20230018701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => 3D MEMORY SEMICONDUCTOR DEVICES AND STRUCTURES WITH BIT-LINE PILLARS [patent_app_type] => utility [patent_app_number] => 17/948225 [patent_app_country] => US [patent_app_date] => 2022-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12995 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17948225 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/948225
3D memory semiconductor devices and structures with bit-line pillars Sep 19, 2022 Issued
Array ( [id] => 20216958 [patent_doc_number] => 12413622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => System and method for generating cyber threat intelligence [patent_app_type] => utility [patent_app_number] => 17/944778 [patent_app_country] => US [patent_app_date] => 2022-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17944778 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/944778
System and method for generating cyber threat intelligence Sep 13, 2022 Issued
Array ( [id] => 19036735 [patent_doc_number] => 20240086550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => Zero-Trust Cloud Development [patent_app_type] => utility [patent_app_number] => 17/944178 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8828 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17944178 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/944178
Zero-trust cloud development Sep 12, 2022 Issued
Array ( [id] => 18661047 [patent_doc_number] => 20230307060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/930625 [patent_app_country] => US [patent_app_date] => 2022-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 401 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17930625 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/930625
Semiconductor memory device Sep 7, 2022 Issued
Array ( [id] => 18112677 [patent_doc_number] => 20230005557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => Detection of an Incorrectly Located Read Voltage [patent_app_type] => utility [patent_app_number] => 17/939756 [patent_app_country] => US [patent_app_date] => 2022-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14344 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17939756 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/939756
Detection of an incorrectly located read voltage Sep 6, 2022 Issued
Array ( [id] => 18562755 [patent_doc_number] => 11728005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Bipolar read retry [patent_app_type] => utility [patent_app_number] => 17/903371 [patent_app_country] => US [patent_app_date] => 2022-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 9848 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17903371 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/903371
Bipolar read retry Sep 5, 2022 Issued
Array ( [id] => 20626091 [patent_doc_number] => 12593621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-31 [patent_title] => Phase change multilayer heterostructure with multiple heaters [patent_app_type] => utility [patent_app_number] => 17/929330 [patent_app_country] => US [patent_app_date] => 2022-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 28 [patent_no_of_words] => 5276 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17929330 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/929330
Phase change multilayer heterostructure with multiple heaters Sep 1, 2022 Issued
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