Search

Stephen M. Baker

Examiner (ID: 13722)

Most Active Art Unit
2112
Art Unit(s)
2784, 2112, 2607, 2133, 2605, 2306, 2313, 2787, 2786
Total Applications
2021
Issued Applications
1703
Pending Applications
72
Abandoned Applications
247

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5761841 [patent_doc_number] => 20060212786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Viterbi path generation for a dynamic Bayesian network' [patent_app_type] => utility [patent_app_number] => 11/352657 [patent_app_country] => US [patent_app_date] => 2006-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4870 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20060212786.pdf [firstpage_image] =>[orig_patent_app_number] => 11352657 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/352657
Viterbi path generation for a Dynamic Bayesian Network Feb 12, 2006 Issued
Array ( [id] => 258211 [patent_doc_number] => 07577899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-18 [patent_title] => 'Cyclic redundancy check (CRC) based error correction method and device' [patent_app_type] => utility [patent_app_number] => 11/352862 [patent_app_country] => US [patent_app_date] => 2006-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5290 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/577/07577899.pdf [firstpage_image] =>[orig_patent_app_number] => 11352862 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/352862
Cyclic redundancy check (CRC) based error correction method and device Feb 12, 2006 Issued
Array ( [id] => 5339251 [patent_doc_number] => 20090055715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'System and Method for Mitigating Memory Requirements' [patent_app_type] => utility [patent_app_number] => 11/884033 [patent_app_country] => US [patent_app_date] => 2006-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 16250 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20090055715.pdf [firstpage_image] =>[orig_patent_app_number] => 11884033 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/884033
System and method for mitigating memory requirements Feb 11, 2006 Issued
Array ( [id] => 368415 [patent_doc_number] => 07480848 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-20 [patent_title] => 'Methods and apparatus to select tornado error correction parameters' [patent_app_type] => utility [patent_app_number] => 11/351760 [patent_app_country] => US [patent_app_date] => 2006-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 11005 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/480/07480848.pdf [firstpage_image] =>[orig_patent_app_number] => 11351760 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/351760
Methods and apparatus to select tornado error correction parameters Feb 9, 2006 Issued
Array ( [id] => 280081 [patent_doc_number] => 07559011 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-07-07 [patent_title] => 'Circuit having a programmable circuit and method of validating a bitstream loaded into a programmable device' [patent_app_type] => utility [patent_app_number] => 11/352034 [patent_app_country] => US [patent_app_date] => 2006-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5315 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/559/07559011.pdf [firstpage_image] =>[orig_patent_app_number] => 11352034 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/352034
Circuit having a programmable circuit and method of validating a bitstream loaded into a programmable device Feb 9, 2006 Issued
Array ( [id] => 8627025 [patent_doc_number] => 08359529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-22 [patent_title] => 'Information processing apparatus and information processing method' [patent_app_type] => utility [patent_app_number] => 11/883454 [patent_app_country] => US [patent_app_date] => 2006-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 10541 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11883454 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/883454
Information processing apparatus and information processing method Jan 26, 2006 Issued
Array ( [id] => 5448142 [patent_doc_number] => 20090049368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-19 [patent_title] => 'Method and Device of Rewriting a Primary Sector of a Sector Erasable Semiconductor Memory Means' [patent_app_type] => utility [patent_app_number] => 11/885777 [patent_app_country] => US [patent_app_date] => 2006-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1763 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20090049368.pdf [firstpage_image] =>[orig_patent_app_number] => 11885777 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/885777
Method and device of rewriting a primary sector of a sector erasable semiconductor memory means Jan 22, 2006 Issued
Array ( [id] => 5778543 [patent_doc_number] => 20060107183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'Error-correction coding method, error-correction decoding method, error-correction coding apparatus, and error-correction decoding apparatus' [patent_app_type] => utility [patent_app_number] => 11/305026 [patent_app_country] => US [patent_app_date] => 2005-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9079 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20060107183.pdf [firstpage_image] =>[orig_patent_app_number] => 11305026 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/305026
Error correction encoding and decoding methods and apparatuses for DVI audio data Dec 18, 2005 Issued
Array ( [id] => 58773 [patent_doc_number] => 07770090 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-08-03 [patent_title] => 'Efficient decoders for LDPC codes' [patent_app_type] => utility [patent_app_number] => 11/303449 [patent_app_country] => US [patent_app_date] => 2005-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 9378 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/770/07770090.pdf [firstpage_image] =>[orig_patent_app_number] => 11303449 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/303449
Efficient decoders for LDPC codes Dec 15, 2005 Issued
Array ( [id] => 5870051 [patent_doc_number] => 20060164263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Method and apparatus for encoding and decoding modulation code' [patent_app_type] => utility [patent_app_number] => 11/302381 [patent_app_country] => US [patent_app_date] => 2005-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3356 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20060164263.pdf [firstpage_image] =>[orig_patent_app_number] => 11302381 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/302381
Method and apparatus for encoding and decoding modulation code Dec 13, 2005 Issued
Array ( [id] => 5847265 [patent_doc_number] => 20060123319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Signal processing method and apparatus, signal reproducing method and apparatus, and recording medium' [patent_app_type] => utility [patent_app_number] => 11/302281 [patent_app_country] => US [patent_app_date] => 2005-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8651 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20060123319.pdf [firstpage_image] =>[orig_patent_app_number] => 11302281 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/302281
Signal processing method and apparatus, signal reproducing method and apparatus, and recording medium Dec 13, 2005 Issued
Array ( [id] => 5033571 [patent_doc_number] => 20070098110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Method and apparatus for forward error correction in a content distribution system' [patent_app_type] => utility [patent_app_number] => 11/302445 [patent_app_country] => US [patent_app_date] => 2005-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6195 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20070098110.pdf [firstpage_image] =>[orig_patent_app_number] => 11302445 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/302445
Method and apparatus for forward error correction in a content distribution system Dec 12, 2005 Issued
Array ( [id] => 1078914 [patent_doc_number] => 07617434 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-11-10 [patent_title] => 'Adaptive error correction' [patent_app_type] => utility [patent_app_number] => 11/302101 [patent_app_country] => US [patent_app_date] => 2005-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5508 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/617/07617434.pdf [firstpage_image] =>[orig_patent_app_number] => 11302101 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/302101
Adaptive error correction Dec 12, 2005 Issued
Array ( [id] => 5778523 [patent_doc_number] => 20060107163 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'Turbo decoding apparatus and interleave-deinterleave apparatus' [patent_app_type] => utility [patent_app_number] => 11/296678 [patent_app_country] => US [patent_app_date] => 2005-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9530 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20060107163.pdf [firstpage_image] =>[orig_patent_app_number] => 11296678 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/296678
Turbo decoding apparatus and interleave-deinterleave apparatus Dec 6, 2005 Issued
Array ( [id] => 5238336 [patent_doc_number] => 20070130493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-07 [patent_title] => 'Feedback and Frame Synchronization between Media Encoders and Decoders' [patent_app_type] => utility [patent_app_number] => 11/275071 [patent_app_country] => US [patent_app_date] => 2005-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6980 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20070130493.pdf [firstpage_image] =>[orig_patent_app_number] => 11275071 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/275071
Feedback and frame synchronization between media encoders and decoders Dec 6, 2005 Issued
Array ( [id] => 375017 [patent_doc_number] => 07475325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-06 [patent_title] => 'Data processor' [patent_app_type] => utility [patent_app_number] => 11/293980 [patent_app_country] => US [patent_app_date] => 2005-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 6547 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/475/07475325.pdf [firstpage_image] =>[orig_patent_app_number] => 11293980 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/293980
Data processor Dec 4, 2005 Issued
Array ( [id] => 5657817 [patent_doc_number] => 20060143553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Error correction processing unit and error correction processing method' [patent_app_type] => utility [patent_app_number] => 11/289540 [patent_app_country] => US [patent_app_date] => 2005-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4556 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20060143553.pdf [firstpage_image] =>[orig_patent_app_number] => 11289540 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/289540
Error correction processing unit and error correction processing method Nov 29, 2005 Abandoned
Array ( [id] => 305864 [patent_doc_number] => 07536623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-19 [patent_title] => 'Method and apparatus for generating a low-density parity check code' [patent_app_type] => utility [patent_app_number] => 11/289300 [patent_app_country] => US [patent_app_date] => 2005-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 6338 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/536/07536623.pdf [firstpage_image] =>[orig_patent_app_number] => 11289300 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/289300
Method and apparatus for generating a low-density parity check code Nov 29, 2005 Issued
Array ( [id] => 333111 [patent_doc_number] => 07512843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-31 [patent_title] => 'Apparatus and method for interleaving channels in a mobile communication system' [patent_app_type] => utility [patent_app_number] => 11/289570 [patent_app_country] => US [patent_app_date] => 2005-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10009 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/512/07512843.pdf [firstpage_image] =>[orig_patent_app_number] => 11289570 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/289570
Apparatus and method for interleaving channels in a mobile communication system Nov 29, 2005 Issued
Array ( [id] => 571855 [patent_doc_number] => 07469368 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-23 [patent_title] => 'Method and system for a non-volatile memory with multiple bits error correction and detection for improving production yield' [patent_app_type] => utility [patent_app_number] => 11/288627 [patent_app_country] => US [patent_app_date] => 2005-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8302 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/469/07469368.pdf [firstpage_image] =>[orig_patent_app_number] => 11288627 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/288627
Method and system for a non-volatile memory with multiple bits error correction and detection for improving production yield Nov 28, 2005 Issued
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