Search

Stephen M. Baker

Examiner (ID: 15390)

Most Active Art Unit
2112
Art Unit(s)
2133, 2784, 2605, 2786, 2607, 2313, 2112, 2787, 2306
Total Applications
2021
Issued Applications
1703
Pending Applications
72
Abandoned Applications
247

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5663170 [patent_doc_number] => 20060253766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'Convolution-encoded data storage on a redundant array of independent devices' [patent_app_type] => utility [patent_app_number] => 11/124647 [patent_app_country] => US [patent_app_date] => 2005-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9182 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20060253766.pdf [firstpage_image] =>[orig_patent_app_number] => 11124647 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/124647
Convolution-encoded data storage on a redundant array of independent devices May 8, 2005 Issued
Array ( [id] => 7208780 [patent_doc_number] => 20050258984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'LDPC architecture' [patent_app_type] => utility [patent_app_number] => 11/123671 [patent_app_country] => US [patent_app_date] => 2005-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8121 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20050258984.pdf [firstpage_image] =>[orig_patent_app_number] => 11123671 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/123671
LDPC architecture May 5, 2005 Issued
Array ( [id] => 868994 [patent_doc_number] => 07370258 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-06 [patent_title] => 'Iterative concatenated convolutional Reed-Solomon decoding method' [patent_app_type] => utility [patent_app_number] => 11/116340 [patent_app_country] => US [patent_app_date] => 2005-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3872 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/370/07370258.pdf [firstpage_image] =>[orig_patent_app_number] => 11116340 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/116340
Iterative concatenated convolutional Reed-Solomon decoding method Apr 27, 2005 Issued
Array ( [id] => 5928180 [patent_doc_number] => 20060242532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-26 [patent_title] => 'Techniques to provide information validation and transfer' [patent_app_type] => utility [patent_app_number] => 11/115656 [patent_app_country] => US [patent_app_date] => 2005-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4739 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20060242532.pdf [firstpage_image] =>[orig_patent_app_number] => 11115656 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/115656
Techniques to provide information validation and transfer Apr 25, 2005 Issued
Array ( [id] => 7071228 [patent_doc_number] => 20050246613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-03 [patent_title] => 'Error recovery within processing stages of an integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/110961 [patent_app_country] => US [patent_app_date] => 2005-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 19790 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20050246613.pdf [firstpage_image] =>[orig_patent_app_number] => 11110961 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/110961
Error recovery within processing stages of an integrated circuit Apr 20, 2005 Issued
Array ( [id] => 5853020 [patent_doc_number] => 20060236211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-19 [patent_title] => 'Cyclic redundancy check modification for length detection of message with convolutional protection' [patent_app_type] => utility [patent_app_number] => 11/105413 [patent_app_country] => US [patent_app_date] => 2005-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10474 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20060236211.pdf [firstpage_image] =>[orig_patent_app_number] => 11105413 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/105413
Cyclic redundancy check modification for length detection of message with convolutional protection Apr 13, 2005 Issued
Array ( [id] => 302197 [patent_doc_number] => 07539927 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-26 [patent_title] => 'High speed hardware implementation of modified Reed-Solomon decoder' [patent_app_type] => utility [patent_app_number] => 11/105420 [patent_app_country] => US [patent_app_date] => 2005-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 8047 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/539/07539927.pdf [firstpage_image] =>[orig_patent_app_number] => 11105420 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/105420
High speed hardware implementation of modified Reed-Solomon decoder Apr 13, 2005 Issued
Array ( [id] => 6967965 [patent_doc_number] => 20050234862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-20 [patent_title] => 'Method for interleaving data frame and circuit thereof' [patent_app_type] => utility [patent_app_number] => 11/103932 [patent_app_country] => US [patent_app_date] => 2005-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3306 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20050234862.pdf [firstpage_image] =>[orig_patent_app_number] => 11103932 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/103932
Method for interleaving data frame and circuit thereof Apr 11, 2005 Issued
Array ( [id] => 600440 [patent_doc_number] => 07437650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Pre-emptive interleaver address generator for turbo decoders' [patent_app_type] => utility [patent_app_number] => 11/103489 [patent_app_country] => US [patent_app_date] => 2005-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3962 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/437/07437650.pdf [firstpage_image] =>[orig_patent_app_number] => 11103489 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/103489
Pre-emptive interleaver address generator for turbo decoders Apr 11, 2005 Issued
Array ( [id] => 48966 [patent_doc_number] => 07779327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-17 [patent_title] => 'Dual stream structure digital television transmission and receiving method using hybrid of E-8VSB, E-4VSB and P2VSB' [patent_app_type] => utility [patent_app_number] => 10/594467 [patent_app_country] => US [patent_app_date] => 2005-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9769 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/779/07779327.pdf [firstpage_image] =>[orig_patent_app_number] => 10594467 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/594467
Dual stream structure digital television transmission and receiving method using hybrid of E-8VSB, E-4VSB and P2VSB Mar 31, 2005 Issued
Array ( [id] => 317035 [patent_doc_number] => 07526687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-28 [patent_title] => 'Turbo code interleaver with near optimal performance' [patent_app_type] => utility [patent_app_number] => 11/051585 [patent_app_country] => US [patent_app_date] => 2005-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8496 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/526/07526687.pdf [firstpage_image] =>[orig_patent_app_number] => 11051585 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/051585
Turbo code interleaver with near optimal performance Mar 29, 2005 Issued
Array ( [id] => 6953747 [patent_doc_number] => 20050228842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Apparatus for checking data coherence, raid controller and storage system having the same, and method therefor' [patent_app_type] => utility [patent_app_number] => 11/088739 [patent_app_country] => US [patent_app_date] => 2005-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6908 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20050228842.pdf [firstpage_image] =>[orig_patent_app_number] => 11088739 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/088739
Apparatus for checking data coherence, raid controller and storage system having the same, and method therefor Mar 24, 2005 Issued
Array ( [id] => 6965306 [patent_doc_number] => 20050232203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-20 [patent_title] => 'Data processing apparatus, and its processing method, program product and mobile telephone apparatus' [patent_app_type] => utility [patent_app_number] => 11/088883 [patent_app_country] => US [patent_app_date] => 2005-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6942 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20050232203.pdf [firstpage_image] =>[orig_patent_app_number] => 11088883 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/088883
Data processing apparatus, and its processing method, program product and mobile telephone apparatus Mar 24, 2005 Issued
Array ( [id] => 5701785 [patent_doc_number] => 20060218470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Multiply redundant raid system and XOR-efficient method and apparatus for implementing the same' [patent_app_type] => utility [patent_app_number] => 11/080093 [patent_app_country] => US [patent_app_date] => 2005-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 13131 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20060218470.pdf [firstpage_image] =>[orig_patent_app_number] => 11080093 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/080093
Multiply redundant raid system and XOR-efficient method and apparatus for implementing the same Mar 14, 2005 Issued
Array ( [id] => 598589 [patent_doc_number] => 07451380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-11 [patent_title] => 'Method for implementing enhanced vertical ECC storage in a dynamic random access memory' [patent_app_type] => utility [patent_app_number] => 11/071086 [patent_app_country] => US [patent_app_date] => 2005-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 28 [patent_no_of_words] => 4202 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/451/07451380.pdf [firstpage_image] =>[orig_patent_app_number] => 11071086 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/071086
Method for implementing enhanced vertical ECC storage in a dynamic random access memory Mar 2, 2005 Issued
Array ( [id] => 5847251 [patent_doc_number] => 20060123313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'System and method for securely adding redundancy to an electronic message' [patent_app_type] => utility [patent_app_number] => 11/059676 [patent_app_country] => US [patent_app_date] => 2005-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4515 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20060123313.pdf [firstpage_image] =>[orig_patent_app_number] => 11059676 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/059676
System and method for securely adding redundancy to an electronic message Feb 16, 2005 Issued
Array ( [id] => 571940 [patent_doc_number] => 07469373 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-23 [patent_title] => 'Application of a Meta-Viterbi algorithm for communication systems without intersymbol interference' [patent_app_type] => utility [patent_app_number] => 11/059875 [patent_app_country] => US [patent_app_date] => 2005-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4753 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/469/07469373.pdf [firstpage_image] =>[orig_patent_app_number] => 11059875 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/059875
Application of a Meta-Viterbi algorithm for communication systems without intersymbol interference Feb 16, 2005 Issued
Array ( [id] => 4589900 [patent_doc_number] => 07861146 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'Viterbi decoding apparatus and Viterbi decoding method' [patent_app_type] => utility [patent_app_number] => 11/597541 [patent_app_country] => US [patent_app_date] => 2005-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 9386 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/861/07861146.pdf [firstpage_image] =>[orig_patent_app_number] => 11597541 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/597541
Viterbi decoding apparatus and Viterbi decoding method Feb 15, 2005 Issued
Array ( [id] => 5795121 [patent_doc_number] => 20060015802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-19 [patent_title] => 'Layered decoding approach for low density parity check (LDPC) codes' [patent_app_type] => utility [patent_app_number] => 11/056755 [patent_app_country] => US [patent_app_date] => 2005-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6525 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20060015802.pdf [firstpage_image] =>[orig_patent_app_number] => 11056755 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/056755
Layered decoding approach for low density parity check (LDPC) codes Feb 10, 2005 Issued
Array ( [id] => 846305 [patent_doc_number] => 07389464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-17 [patent_title] => 'Apparatus and method for encoding and decoding a space-time low density parity check code with full diversity gain' [patent_app_type] => utility [patent_app_number] => 11/052673 [patent_app_country] => US [patent_app_date] => 2005-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 11350 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/389/07389464.pdf [firstpage_image] =>[orig_patent_app_number] => 11052673 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/052673
Apparatus and method for encoding and decoding a space-time low density parity check code with full diversity gain Feb 6, 2005 Issued
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