
Stephen M. Baker
Examiner (ID: 15390)
| Most Active Art Unit | 2112 |
| Art Unit(s) | 2133, 2784, 2605, 2786, 2607, 2313, 2112, 2787, 2306 |
| Total Applications | 2021 |
| Issued Applications | 1703 |
| Pending Applications | 72 |
| Abandoned Applications | 247 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6989994
[patent_doc_number] => 20050089031
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-28
[patent_title] => 'Determining a checksum from packet data'
[patent_app_type] => utility
[patent_app_number] => 10/692585
[patent_app_country] => US
[patent_app_date] => 2003-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 3725
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0089/20050089031.pdf
[firstpage_image] =>[orig_patent_app_number] => 10692585
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/692585 | Determining a checksum from packet data | Oct 22, 2003 | Issued |
Array
(
[id] => 671685
[patent_doc_number] => 07096415
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-08-22
[patent_title] => 'System to limit access when calculating network data checksums'
[patent_app_type] => utility
[patent_app_number] => 10/688205
[patent_app_country] => US
[patent_app_date] => 2003-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2241
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/096/07096415.pdf
[firstpage_image] =>[orig_patent_app_number] => 10688205
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/688205 | System to limit access when calculating network data checksums | Oct 16, 2003 | Issued |
Array
(
[id] => 615918
[patent_doc_number] => 07149954
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-12
[patent_title] => 'Method and system for programmable field statistic for picture cyclic redundancy check (CRC)'
[patent_app_type] => utility
[patent_app_number] => 10/646717
[patent_app_country] => US
[patent_app_date] => 2003-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3684
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/149/07149954.pdf
[firstpage_image] =>[orig_patent_app_number] => 10646717
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/646717 | Method and system for programmable field statistic for picture cyclic redundancy check (CRC) | Aug 24, 2003 | Issued |
Array
(
[id] => 7215366
[patent_doc_number] => 20050044470
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-24
[patent_title] => 'Identifying systematic errors in a data recording system'
[patent_app_type] => utility
[patent_app_number] => 10/646648
[patent_app_country] => US
[patent_app_date] => 2003-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5747
[patent_no_of_claims] => 57
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0044/20050044470.pdf
[firstpage_image] =>[orig_patent_app_number] => 10646648
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/646648 | Identifying systematic errors in a data recording system | Aug 20, 2003 | Issued |
Array
(
[id] => 890855
[patent_doc_number] => 07353438
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-01
[patent_title] => 'Transparent error correcting memory'
[patent_app_type] => utility
[patent_app_number] => 10/645861
[patent_app_country] => US
[patent_app_date] => 2003-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 15625
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/353/07353438.pdf
[firstpage_image] =>[orig_patent_app_number] => 10645861
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/645861 | Transparent error correcting memory | Aug 19, 2003 | Issued |
Array
(
[id] => 925127
[patent_doc_number] => 07320101
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-01-15
[patent_title] => 'Fast parallel calculation of cyclic redundancy checks'
[patent_app_type] => utility
[patent_app_number] => 10/644223
[patent_app_country] => US
[patent_app_date] => 2003-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 16
[patent_no_of_words] => 6246
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/320/07320101.pdf
[firstpage_image] =>[orig_patent_app_number] => 10644223
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/644223 | Fast parallel calculation of cyclic redundancy checks | Aug 18, 2003 | Issued |
Array
(
[id] => 667111
[patent_doc_number] => 07103825
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-09-05
[patent_title] => 'Decoding error-correcting codes based on finite geometries'
[patent_app_type] => utility
[patent_app_number] => 10/643618
[patent_app_country] => US
[patent_app_date] => 2003-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 6496
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/103/07103825.pdf
[firstpage_image] =>[orig_patent_app_number] => 10643618
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/643618 | Decoding error-correcting codes based on finite geometries | Aug 18, 2003 | Issued |
Array
(
[id] => 7333647
[patent_doc_number] => 20040255224
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-16
[patent_title] => 'Semiconductor storage device and evaluation method'
[patent_app_type] => new
[patent_app_number] => 10/641048
[patent_app_country] => US
[patent_app_date] => 2003-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6297
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0255/20040255224.pdf
[firstpage_image] =>[orig_patent_app_number] => 10641048
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/641048 | Semiconductor storage device and evaluation method | Aug 14, 2003 | Abandoned |
Array
(
[id] => 587251
[patent_doc_number] => 07467347
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-16
[patent_title] => 'Method for decoding error correcting code, its program and its device'
[patent_app_type] => utility
[patent_app_number] => 10/641563
[patent_app_country] => US
[patent_app_date] => 2003-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 23
[patent_no_of_words] => 11300
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/467/07467347.pdf
[firstpage_image] =>[orig_patent_app_number] => 10641563
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/641563 | Method for decoding error correcting code, its program and its device | Aug 14, 2003 | Issued |
Array
(
[id] => 6974024
[patent_doc_number] => 20050039100
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-17
[patent_title] => 'Method and system for automatic error recovery in an electronic mail system'
[patent_app_type] => utility
[patent_app_number] => 10/640822
[patent_app_country] => US
[patent_app_date] => 2003-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3131
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0039/20050039100.pdf
[firstpage_image] =>[orig_patent_app_number] => 10640822
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/640822 | Method and system for automatic error recovery in an electronic mail system | Aug 13, 2003 | Abandoned |
Array
(
[id] => 7675870
[patent_doc_number] => 20040153957
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-05
[patent_title] => 'Convolutional decoding'
[patent_app_type] => new
[patent_app_number] => 10/639881
[patent_app_country] => US
[patent_app_date] => 2003-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4372
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 8
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0153/20040153957.pdf
[firstpage_image] =>[orig_patent_app_number] => 10639881
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/639881 | Convolutional decoding | Aug 12, 2003 | Issued |
Array
(
[id] => 7300670
[patent_doc_number] => 20040216024
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-28
[patent_title] => 'Methods and apparatus for interleaving in a block-coherent communication system'
[patent_app_type] => new
[patent_app_number] => 10/637844
[patent_app_country] => US
[patent_app_date] => 2003-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5014
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0216/20040216024.pdf
[firstpage_image] =>[orig_patent_app_number] => 10637844
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/637844 | Methods and apparatus for interleaving in a block-coherent communication system | Aug 7, 2003 | Issued |
Array
(
[id] => 7282400
[patent_doc_number] => 20040064777
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-01
[patent_title] => 'Turbo decoder architecture with mini-trellis siso'
[patent_app_type] => new
[patent_app_number] => 10/633791
[patent_app_country] => US
[patent_app_date] => 2003-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5412
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0064/20040064777.pdf
[firstpage_image] =>[orig_patent_app_number] => 10633791
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/633791 | Turbo decoder architecture with mini-trellis SISO | Aug 3, 2003 | Issued |
Array
(
[id] => 667112
[patent_doc_number] => 07103826
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-09-05
[patent_title] => 'Memory system and controller for same'
[patent_app_type] => utility
[patent_app_number] => 10/632199
[patent_app_country] => US
[patent_app_date] => 2003-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5674
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/103/07103826.pdf
[firstpage_image] =>[orig_patent_app_number] => 10632199
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/632199 | Memory system and controller for same | Jul 30, 2003 | Issued |
Array
(
[id] => 7306364
[patent_doc_number] => 20040141389
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-22
[patent_title] => 'Solid state storage device and data storage method'
[patent_app_type] => new
[patent_app_number] => 10/632130
[patent_app_country] => US
[patent_app_date] => 2003-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4719
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 16
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0141/20040141389.pdf
[firstpage_image] =>[orig_patent_app_number] => 10632130
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/632130 | Solid state storage device and data storage method | Jul 29, 2003 | Abandoned |
Array
(
[id] => 671678
[patent_doc_number] => 07096409
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-22
[patent_title] => 'Reed-solomon decoder and decoding method for errors and erasures decoding'
[patent_app_type] => utility
[patent_app_number] => 10/632125
[patent_app_country] => US
[patent_app_date] => 2003-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6801
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/096/07096409.pdf
[firstpage_image] =>[orig_patent_app_number] => 10632125
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/632125 | Reed-solomon decoder and decoding method for errors and erasures decoding | Jul 29, 2003 | Issued |
Array
(
[id] => 7160675
[patent_doc_number] => 20050028056
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-03
[patent_title] => 'Systems and methods of routing data to facilitate error correction'
[patent_app_type] => utility
[patent_app_number] => 10/632206
[patent_app_country] => US
[patent_app_date] => 2003-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6932
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0028/20050028056.pdf
[firstpage_image] =>[orig_patent_app_number] => 10632206
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/632206 | Systems and methods of routing data to facilitate error correction | Jul 28, 2003 | Issued |
Array
(
[id] => 7160685
[patent_doc_number] => 20050028057
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-03
[patent_title] => 'Systems and methods of partitioning data to facilitate error correction'
[patent_app_type] => utility
[patent_app_number] => 10/632207
[patent_app_country] => US
[patent_app_date] => 2003-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5766
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0028/20050028057.pdf
[firstpage_image] =>[orig_patent_app_number] => 10632207
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/632207 | Systems and methods of partitioning data to facilitate error correction | Jul 28, 2003 | Issued |
Array
(
[id] => 927530
[patent_doc_number] => 07318189
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-01-08
[patent_title] => 'Parallel convolutional encoder'
[patent_app_type] => utility
[patent_app_number] => 10/629644
[patent_app_country] => US
[patent_app_date] => 2003-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2657
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/318/07318189.pdf
[firstpage_image] =>[orig_patent_app_number] => 10629644
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/629644 | Parallel convolutional encoder | Jul 28, 2003 | Issued |
Array
(
[id] => 713458
[patent_doc_number] => 07062703
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-06-13
[patent_title] => 'Early detection of false start-of-packet triggers in a wireless network node'
[patent_app_type] => utility
[patent_app_number] => 10/629383
[patent_app_country] => US
[patent_app_date] => 2003-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 8648
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/062/07062703.pdf
[firstpage_image] =>[orig_patent_app_number] => 10629383
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/629383 | Early detection of false start-of-packet triggers in a wireless network node | Jul 27, 2003 | Issued |