Search

Stephen M Baker

Examiner (ID: 13722)

Most Active Art Unit
2112
Art Unit(s)
2784, 2112, 2607, 2133, 2605, 2306, 2313, 2787, 2786
Total Applications
2021
Issued Applications
1703
Pending Applications
72
Abandoned Applications
247

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7718701 [patent_doc_number] => 08095861 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-10 [patent_title] => 'Cache function overloading' [patent_app_type] => utility [patent_app_number] => 11/863517 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3167 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/095/08095861.pdf [firstpage_image] =>[orig_patent_app_number] => 11863517 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/863517
Cache function overloading Sep 27, 2007 Issued
Array ( [id] => 7525036 [patent_doc_number] => 08028206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-27 [patent_title] => 'Memory device including memory controller' [patent_app_type] => utility [patent_app_number] => 11/862669 [patent_app_country] => US [patent_app_date] => 2007-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 7021 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/028/08028206.pdf [firstpage_image] =>[orig_patent_app_number] => 11862669 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/862669
Memory device including memory controller Sep 26, 2007 Issued
Array ( [id] => 4923811 [patent_doc_number] => 20080072128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-20 [patent_title] => 'DISTRIBUTED RING CONTROL CIRCUITS FOR VITERBI TRACEBACK' [patent_app_type] => utility [patent_app_number] => 11/860493 [patent_app_country] => US [patent_app_date] => 2007-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4238 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20080072128.pdf [firstpage_image] =>[orig_patent_app_number] => 11860493 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/860493
Distributed ring control circuits for Viterbi traceback Sep 23, 2007 Issued
Array ( [id] => 7746554 [patent_doc_number] => 08108758 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-31 [patent_title] => 'Stochastic decoding of LDPC codes' [patent_app_type] => utility [patent_app_number] => 11/902410 [patent_app_country] => US [patent_app_date] => 2007-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 12869 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/108/08108758.pdf [firstpage_image] =>[orig_patent_app_number] => 11902410 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/902410
Stochastic decoding of LDPC codes Sep 20, 2007 Issued
Array ( [id] => 5339138 [patent_doc_number] => 20090055602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'METHOD AND APPARATUS FOR EMBEDDED MEMORY SECURITY' [patent_app_type] => utility [patent_app_number] => 11/858394 [patent_app_country] => US [patent_app_date] => 2007-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4267 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20090055602.pdf [firstpage_image] =>[orig_patent_app_number] => 11858394 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/858394
Method and apparatus for embedded memory security Sep 19, 2007 Issued
Array ( [id] => 5200805 [patent_doc_number] => 20070300123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'Error-Correcting Encoding Apparatus' [patent_app_type] => utility [patent_app_number] => 11/847814 [patent_app_country] => US [patent_app_date] => 2007-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 10414 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0300/20070300123.pdf [firstpage_image] =>[orig_patent_app_number] => 11847814 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/847814
Error-correcting encoding apparatus Aug 29, 2007 Issued
Array ( [id] => 4703556 [patent_doc_number] => 20080063079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-13 [patent_title] => 'APPARATUS AND METHOD FOR RECEIVING DIGITAL VIDEO SIGNALS' [patent_app_type] => utility [patent_app_number] => 11/836135 [patent_app_country] => US [patent_app_date] => 2007-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5479 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20080063079.pdf [firstpage_image] =>[orig_patent_app_number] => 11836135 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/836135
Apparatus and method for receiving digital video signals Aug 7, 2007 Issued
Array ( [id] => 4700318 [patent_doc_number] => 20080222502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-11 [patent_title] => 'ERROR DETERMINING APPARATUS AND METHOD' [patent_app_type] => utility [patent_app_number] => 11/835751 [patent_app_country] => US [patent_app_date] => 2007-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4729 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20080222502.pdf [firstpage_image] =>[orig_patent_app_number] => 11835751 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/835751
ERROR DETERMINING APPARATUS AND METHOD Aug 7, 2007 Abandoned
Array ( [id] => 4667812 [patent_doc_number] => 20080042872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'On-Chip Receiver Sensitivity Test Mechanism' [patent_app_type] => utility [patent_app_number] => 11/835274 [patent_app_country] => US [patent_app_date] => 2007-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6993 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20080042872.pdf [firstpage_image] =>[orig_patent_app_number] => 11835274 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/835274
On-chip receiver sensitivity test mechanism Aug 6, 2007 Issued
Array ( [id] => 7706425 [patent_doc_number] => 08091010 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-03 [patent_title] => 'Error correction circuit and method for reducing miscorrection probability and semiconductor memory device including the circuit' [patent_app_type] => utility [patent_app_number] => 11/834844 [patent_app_country] => US [patent_app_date] => 2007-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6126 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/091/08091010.pdf [firstpage_image] =>[orig_patent_app_number] => 11834844 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/834844
Error correction circuit and method for reducing miscorrection probability and semiconductor memory device including the circuit Aug 6, 2007 Issued
Array ( [id] => 4769467 [patent_doc_number] => 20080055125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'DATA STORAGE SYSTEMS' [patent_app_type] => utility [patent_app_number] => 11/833274 [patent_app_country] => US [patent_app_date] => 2007-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 13653 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20080055125.pdf [firstpage_image] =>[orig_patent_app_number] => 11833274 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/833274
Data storage systems Aug 2, 2007 Issued
Array ( [id] => 5362988 [patent_doc_number] => 20090037782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-05 [patent_title] => 'Detection of address decoder faults' [patent_app_type] => utility [patent_app_number] => 11/882455 [patent_app_country] => US [patent_app_date] => 2007-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4656 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20090037782.pdf [firstpage_image] =>[orig_patent_app_number] => 11882455 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/882455
Detection of address decoder faults Jul 31, 2007 Abandoned
Array ( [id] => 6640537 [patent_doc_number] => 20100005362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-07 [patent_title] => 'SOUND DATA DECODING APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/309597 [patent_app_country] => US [patent_app_date] => 2007-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6986 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20100005362.pdf [firstpage_image] =>[orig_patent_app_number] => 12309597 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/309597
Sound data decoding apparatus Jul 22, 2007 Issued
Array ( [id] => 7542949 [patent_doc_number] => 08060798 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-15 [patent_title] => 'Refresh of non-volatile memory cells based on fatigue conditions' [patent_app_type] => utility [patent_app_number] => 11/879877 [patent_app_country] => US [patent_app_date] => 2007-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7108 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/060/08060798.pdf [firstpage_image] =>[orig_patent_app_number] => 11879877 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/879877
Refresh of non-volatile memory cells based on fatigue conditions Jul 18, 2007 Issued
Array ( [id] => 4809011 [patent_doc_number] => 20080172589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-17 [patent_title] => 'FORWARD ERROR CORRECTION SCHEME COMPATIBLE WITH THE BIT ERROR SPREADING OF A SCRAMBLER' [patent_app_type] => utility [patent_app_number] => 11/776474 [patent_app_country] => US [patent_app_date] => 2007-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6458 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20080172589.pdf [firstpage_image] =>[orig_patent_app_number] => 11776474 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/776474
Forward error correction scheme compatible with the bit error spreading of a scrambler Jul 10, 2007 Issued
Array ( [id] => 4803346 [patent_doc_number] => 20080014935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'EARLY DECODING OF A CONTROL CHANNEL IN A WIRELESS COMMUNICATION SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/775054 [patent_app_country] => US [patent_app_date] => 2007-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6878 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20080014935.pdf [firstpage_image] =>[orig_patent_app_number] => 11775054 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/775054
EARLY DECODING OF A CONTROL CHANNEL IN A WIRELESS COMMUNICATION SYSTEM Jul 8, 2007 Abandoned
Array ( [id] => 4804833 [patent_doc_number] => 20080016422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'TEST APPARATUS, SHIFT AMOUNT MEASURING APPARATUS, SHIFT AMOUNT MEASURING METHOD AND DIAGNOSTIC METHOD' [patent_app_type] => utility [patent_app_number] => 11/774616 [patent_app_country] => US [patent_app_date] => 2007-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6962 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20080016422.pdf [firstpage_image] =>[orig_patent_app_number] => 11774616 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/774616
Test apparatus, shift amount measuring apparatus, shift amount measuring method and diagnostic method Jul 8, 2007 Issued
Array ( [id] => 7517951 [patent_doc_number] => 08042033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-18 [patent_title] => 'Protection of access information in wireless communications' [patent_app_type] => utility [patent_app_number] => 11/772762 [patent_app_country] => US [patent_app_date] => 2007-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 9516 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/042/08042033.pdf [firstpage_image] =>[orig_patent_app_number] => 11772762 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/772762
Protection of access information in wireless communications Jul 1, 2007 Issued
Array ( [id] => 4455088 [patent_doc_number] => 07966547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-21 [patent_title] => 'Multi-bit error correction scheme in multi-level memory storage system' [patent_app_type] => utility [patent_app_number] => 11/772356 [patent_app_country] => US [patent_app_date] => 2007-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7621 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 374 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/966/07966547.pdf [firstpage_image] =>[orig_patent_app_number] => 11772356 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/772356
Multi-bit error correction scheme in multi-level memory storage system Jul 1, 2007 Issued
Array ( [id] => 5351570 [patent_doc_number] => 20090006931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'Techniques For Generating Bit Reliability Information In A Post-Processor Using An Error Correction Constraint' [patent_app_type] => utility [patent_app_number] => 11/771783 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9721 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20090006931.pdf [firstpage_image] =>[orig_patent_app_number] => 11771783 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/771783
Techniques for generating bit reliability information in a post-processor using an error correction constraint Jun 28, 2007 Issued
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