Search

Stephen M Baker

Examiner (ID: 13722)

Most Active Art Unit
2112
Art Unit(s)
2784, 2112, 2607, 2133, 2605, 2306, 2313, 2787, 2786
Total Applications
2021
Issued Applications
1703
Pending Applications
72
Abandoned Applications
247

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7972295 [patent_doc_number] => 07941726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-10 [patent_title] => 'Low dimensional spectral concentration codes and direct list decoding' [patent_app_type] => utility [patent_app_number] => 11/772049 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6489 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/941/07941726.pdf [firstpage_image] =>[orig_patent_app_number] => 11772049 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/772049
Low dimensional spectral concentration codes and direct list decoding Jun 28, 2007 Issued
Array ( [id] => 4455089 [patent_doc_number] => 07966548 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-21 [patent_title] => 'Method and system for encoding data using rate-compatible irregular LDPC codes based on edge growth and parity splitting' [patent_app_type] => utility [patent_app_number] => 11/824408 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4625 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/966/07966548.pdf [firstpage_image] =>[orig_patent_app_number] => 11824408 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/824408
Method and system for encoding data using rate-compatible irregular LDPC codes based on edge growth and parity splitting Jun 28, 2007 Issued
Array ( [id] => 4911426 [patent_doc_number] => 20080022193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-24 [patent_title] => 'ERROR CORRECTION FOR DIGITAL SYSTEMS' [patent_app_type] => utility [patent_app_number] => 11/771243 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4382 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20080022193.pdf [firstpage_image] =>[orig_patent_app_number] => 11771243 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/771243
Error correction for digital systems Jun 28, 2007 Issued
Array ( [id] => 7510606 [patent_doc_number] => 08037393 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Techniques for generating bit reliability information in the post processor' [patent_app_type] => utility [patent_app_number] => 11/771226 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6250 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/037/08037393.pdf [firstpage_image] =>[orig_patent_app_number] => 11771226 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/771226
Techniques for generating bit reliability information in the post processor Jun 28, 2007 Issued
Array ( [id] => 4804841 [patent_doc_number] => 20080016430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'MEMORY CONTROLLER AND SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/770235 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6681 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20080016430.pdf [firstpage_image] =>[orig_patent_app_number] => 11770235 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/770235
Memory controller and semiconductor memory device Jun 27, 2007 Issued
Array ( [id] => 4934867 [patent_doc_number] => 20080005642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'CODING SYSTEM AND DECODING SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/770348 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 24755 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20080005642.pdf [firstpage_image] =>[orig_patent_app_number] => 11770348 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/770348
Coding system and decoding system using a synchronization code Jun 27, 2007 Issued
Array ( [id] => 5226734 [patent_doc_number] => 20070256001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-01 [patent_title] => 'FEC (forward error correction) decoder with dynamic parameters' [patent_app_type] => utility [patent_app_number] => 11/823225 [patent_app_country] => US [patent_app_date] => 2007-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 15446 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20070256001.pdf [firstpage_image] =>[orig_patent_app_number] => 11823225 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/823225
FEC (forward error correction) decoder with dynamic parameters Jun 26, 2007 Issued
Array ( [id] => 5351538 [patent_doc_number] => 20090006899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'ERROR CORRECTING CODE WITH CHIP KILL CAPABILITY AND POWER SAVING ENHANCEMENT' [patent_app_type] => utility [patent_app_number] => 11/768559 [patent_app_country] => US [patent_app_date] => 2007-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5840 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20090006899.pdf [firstpage_image] =>[orig_patent_app_number] => 11768559 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/768559
Error correcting code with chip kill capability and power saving enhancement Jun 25, 2007 Issued
Array ( [id] => 4854630 [patent_doc_number] => 20080320374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'METHOD AND APPARATUS FOR DECODING A LDPC CODE' [patent_app_type] => utility [patent_app_number] => 11/767466 [patent_app_country] => US [patent_app_date] => 2007-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5540 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0320/20080320374.pdf [firstpage_image] =>[orig_patent_app_number] => 11767466 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/767466
METHOD AND APPARATUS FOR DECODING A LDPC CODE Jun 21, 2007 Abandoned
Array ( [id] => 4854626 [patent_doc_number] => 20080320370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'CRC generator polynomial select method, CRC coding method and CRC coding circuit' [patent_app_type] => utility [patent_app_number] => 11/821561 [patent_app_country] => US [patent_app_date] => 2007-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 17753 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0320/20080320370.pdf [firstpage_image] =>[orig_patent_app_number] => 11821561 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/821561
CRC generator polynomial select method, CRC coding method and CRC coding circuit Jun 21, 2007 Issued
Array ( [id] => 4966891 [patent_doc_number] => 20080109711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-08 [patent_title] => 'Wireless Communication System, Wireless Communication Apparatus, Wireless Communication Method, and Computer Program' [patent_app_type] => utility [patent_app_number] => 11/765544 [patent_app_country] => US [patent_app_date] => 2007-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10638 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20080109711.pdf [firstpage_image] =>[orig_patent_app_number] => 11765544 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/765544
Wireless communication system, wireless communication apparatus, wireless communication method, and computer program Jun 19, 2007 Issued
Array ( [id] => 8011035 [patent_doc_number] => 08086935 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-12-27 [patent_title] => 'Soft error correction for a data storage mechanism' [patent_app_type] => utility [patent_app_number] => 11/820391 [patent_app_country] => US [patent_app_date] => 2007-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 5429 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/086/08086935.pdf [firstpage_image] =>[orig_patent_app_number] => 11820391 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/820391
Soft error correction for a data storage mechanism Jun 18, 2007 Issued
Array ( [id] => 7689855 [patent_doc_number] => 20070234178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'SOFT INFORMATION SCALING FOR INTERACTIVE DECODING' [patent_app_type] => utility [patent_app_number] => 11/761353 [patent_app_country] => US [patent_app_date] => 2007-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6391 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20070234178.pdf [firstpage_image] =>[orig_patent_app_number] => 11761353 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/761353
SOFT INFORMATION SCALING FOR INTERACTIVE DECODING Jun 10, 2007 Abandoned
Array ( [id] => 8412615 [patent_doc_number] => 08276026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-25 [patent_title] => 'Transmission apparatus, reception apparatus, and transmission/reception method for same' [patent_app_type] => utility [patent_app_number] => 11/808326 [patent_app_country] => US [patent_app_date] => 2007-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 23 [patent_no_of_words] => 9086 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11808326 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/808326
Transmission apparatus, reception apparatus, and transmission/reception method for same Jun 7, 2007 Issued
Array ( [id] => 8087675 [patent_doc_number] => 08151171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-03 [patent_title] => 'Operational parameter adaptable LDPC (low density parity check) decoder' [patent_app_type] => utility [patent_app_number] => 11/807885 [patent_app_country] => US [patent_app_date] => 2007-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 16728 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/151/08151171.pdf [firstpage_image] =>[orig_patent_app_number] => 11807885 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/807885
Operational parameter adaptable LDPC (low density parity check) decoder May 29, 2007 Issued
Array ( [id] => 9023553 [patent_doc_number] => 08533551 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-10 [patent_title] => 'Audio error detection and processing' [patent_app_type] => utility [patent_app_number] => 12/451741 [patent_app_country] => US [patent_app_date] => 2007-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6920 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12451741 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/451741
Audio error detection and processing May 29, 2007 Issued
Array ( [id] => 4878238 [patent_doc_number] => 20080151621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'Multi-level cell memory devices and methods of storing data in and reading data from the memory devices' [patent_app_type] => utility [patent_app_number] => 11/802656 [patent_app_country] => US [patent_app_date] => 2007-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6464 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20080151621.pdf [firstpage_image] =>[orig_patent_app_number] => 11802656 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/802656
Multi-level cell memory devices and methods of storing data in and reading data from the memory devices May 23, 2007 Issued
Array ( [id] => 5006628 [patent_doc_number] => 20070204201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'HIGH RELIABILITY MEMORY MODULE WITH A FAULT TOLERANT ADDRESS AND COMMAND BUS' [patent_app_type] => utility [patent_app_number] => 11/741319 [patent_app_country] => US [patent_app_date] => 2007-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10515 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20070204201.pdf [firstpage_image] =>[orig_patent_app_number] => 11741319 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/741319
High reliability memory module with a fault tolerant address and command bus Apr 26, 2007 Issued
Array ( [id] => 5006627 [patent_doc_number] => 20070204200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'HIGH RELIABILITY MEMORY MODULE WITH A FAULT TOLERANT ADDRESS AND COMMAND BUS' [patent_app_type] => utility [patent_app_number] => 11/741314 [patent_app_country] => US [patent_app_date] => 2007-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10586 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20070204200.pdf [firstpage_image] =>[orig_patent_app_number] => 11741314 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/741314
HIGH RELIABILITY MEMORY MODULE WITH A FAULT TOLERANT ADDRESS AND COMMAND BUS Apr 26, 2007 Abandoned
Array ( [id] => 4671731 [patent_doc_number] => 20080046792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'Node device, control device, control method and control program' [patent_app_type] => utility [patent_app_number] => 11/785759 [patent_app_country] => US [patent_app_date] => 2007-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5997 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20080046792.pdf [firstpage_image] =>[orig_patent_app_number] => 11785759 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/785759
Node device, control device, control method and control program Apr 18, 2007 Issued
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