Search

Stephen T. Gordon

Examiner (ID: 147, Phone: (571)272-6661 , Office: P/3612 )

Most Active Art Unit
3612
Art Unit(s)
3612, 3642, 3616, 3614, 3107, 2899
Total Applications
2791
Issued Applications
2320
Pending Applications
117
Abandoned Applications
376

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14446565 [patent_doc_number] => 20190181156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => CONTACT STRUCTURE AND DISPLAY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/165059 [patent_app_country] => US [patent_app_date] => 2018-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14338 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16165059 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/165059
Contact structure and display device including the same Oct 18, 2018 Issued
Array ( [id] => 16356431 [patent_doc_number] => 10796949 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Airgap vias in electrical interconnects [patent_app_type] => utility [patent_app_number] => 16/165251 [patent_app_country] => US [patent_app_date] => 2018-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 5633 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16165251 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/165251
Airgap vias in electrical interconnects Oct 18, 2018 Issued
Array ( [id] => 14238219 [patent_doc_number] => 20190131282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => MICRO-LED DISPLAY PANEL AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/164816 [patent_app_country] => US [patent_app_date] => 2018-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6700 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16164816 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/164816
Micro-LED display panel and manufacturing method thereof Oct 18, 2018 Issued
Array ( [id] => 16280116 [patent_doc_number] => 10763156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-01 [patent_title] => Integrated circuit device [patent_app_type] => utility [patent_app_number] => 16/165294 [patent_app_country] => US [patent_app_date] => 2018-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 61 [patent_no_of_words] => 12735 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16165294 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/165294
Integrated circuit device Oct 18, 2018 Issued
Array ( [id] => 15807705 [patent_doc_number] => 20200126995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => MEMORY IMPLEMENTED USING NEGATIVE CAPACITANCE MATERIAL [patent_app_type] => utility [patent_app_number] => 16/165028 [patent_app_country] => US [patent_app_date] => 2018-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4810 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16165028 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/165028
MEMORY IMPLEMENTED USING NEGATIVE CAPACITANCE MATERIAL Oct 18, 2018 Abandoned
Array ( [id] => 16068043 [patent_doc_number] => 10692987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => IC structure with air gap adjacent to gate structure and methods of forming same [patent_app_type] => utility [patent_app_number] => 16/164867 [patent_app_country] => US [patent_app_date] => 2018-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 6390 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16164867 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/164867
IC structure with air gap adjacent to gate structure and methods of forming same Oct 18, 2018 Issued
Array ( [id] => 15807567 [patent_doc_number] => 20200126926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => MIDDLE-OF-LINE INTERCONNECT HAVING LOW METAL-TO-METAL INTERFACE RESISTANCE [patent_app_type] => utility [patent_app_number] => 16/164940 [patent_app_country] => US [patent_app_date] => 2018-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6010 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16164940 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/164940
Middle-of-line interconnect having low metal-to-metal interface resistance Oct 18, 2018 Issued
Array ( [id] => 13936405 [patent_doc_number] => 20190051718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/161081 [patent_app_country] => US [patent_app_date] => 2018-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8330 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 393 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16161081 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/161081
Display panel and display device Oct 15, 2018 Issued
Array ( [id] => 18402242 [patent_doc_number] => 11664392 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Flexible array substrate, manufacturing method thereof and display device [patent_app_type] => utility [patent_app_number] => 16/337557 [patent_app_country] => US [patent_app_date] => 2018-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 24 [patent_no_of_words] => 10245 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16337557 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/337557
Flexible array substrate, manufacturing method thereof and display device Oct 14, 2018 Issued
Array ( [id] => 14801381 [patent_doc_number] => 10403701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Electro-optical device and electronic apparatus [patent_app_type] => utility [patent_app_number] => 16/158953 [patent_app_country] => US [patent_app_date] => 2018-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 25809 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16158953 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/158953
Electro-optical device and electronic apparatus Oct 11, 2018 Issued
Array ( [id] => 13932669 [patent_doc_number] => 20190049850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => PARTICLE IRRADIATION APPARATUS, BEAM MODIFIER DEVICE, AND SEMICONDUCTOR DEVICE INCLUDING A JUNCTION TERMINATION EXTENSION ZONE [patent_app_type] => utility [patent_app_number] => 16/153186 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9331 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16153186 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/153186
Particle irradiation apparatus, beam modifier device, and semiconductor device including a junction termination extension zone Oct 4, 2018 Issued
Array ( [id] => 17032821 [patent_doc_number] => 11094639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-17 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 16/146968 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 7943 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16146968 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/146968
Semiconductor package Sep 27, 2018 Issued
Array ( [id] => 15718041 [patent_doc_number] => 20200105788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => FERROELECTRIC GATE OXIDE BASED TUNNEL FEFET MEMORY [patent_app_type] => utility [patent_app_number] => 16/143933 [patent_app_country] => US [patent_app_date] => 2018-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16143933 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/143933
Ferroelectric gate oxide based tunnel feFET memory Sep 26, 2018 Issued
Array ( [id] => 15688433 [patent_doc_number] => 20200098880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => CHANNEL STRUCTURES FOR THIN-FILM TRANSISTORS [patent_app_type] => utility [patent_app_number] => 16/142045 [patent_app_country] => US [patent_app_date] => 2018-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10920 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16142045 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/142045
Channel structures for thin-film transistors Sep 25, 2018 Issued
Array ( [id] => 15657775 [patent_doc_number] => 20200091418 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => Diamond-Like Carbon Hardmask for MRAM [patent_app_type] => utility [patent_app_number] => 16/131989 [patent_app_country] => US [patent_app_date] => 2018-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3675 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16131989 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/131989
Diamond-like carbon hardmask for MRAM Sep 13, 2018 Issued
Array ( [id] => 14382169 [patent_doc_number] => 20190164997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME, DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/131959 [patent_app_country] => US [patent_app_date] => 2018-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4266 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16131959 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/131959
Array substrate and method for manufacturing the same, display panel and display device Sep 13, 2018 Issued
Array ( [id] => 15547561 [patent_doc_number] => 10573570 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Semiconductor device and power conversion device [patent_app_type] => utility [patent_app_number] => 16/132119 [patent_app_country] => US [patent_app_date] => 2018-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3054 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16132119 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/132119
Semiconductor device and power conversion device Sep 13, 2018 Issued
Array ( [id] => 15955365 [patent_doc_number] => 10665598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-26 [patent_title] => Semiconductor memory device and method for manufacturing same [patent_app_type] => utility [patent_app_number] => 16/128655 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 5264 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16128655 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/128655
Semiconductor memory device and method for manufacturing same Sep 11, 2018 Issued
Array ( [id] => 14238247 [patent_doc_number] => 20190131296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => BOOTSTRAP METAL-OXIDE-SEMICONDUCTOR (MOS) DEVICE INTEGRATED WITH A HIGH VOLTAGE MOS (HVMOS) DEVICE AND A HIGH VOLTAGE JUNCTION TERMINATION (HVJT) DEVICE [patent_app_type] => utility [patent_app_number] => 16/128578 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19771 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16128578 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/128578
Bootstrap metal-oxide-semiconductor (MOS) device integrated with a high voltage MOS (HVMOS) device and a high voltage junction termination (HVJT) device Sep 11, 2018 Issued
Array ( [id] => 14904557 [patent_doc_number] => 20190296044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 16/128666 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7558 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16128666 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/128666
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME Sep 11, 2018 Abandoned
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