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Stephen W Jordan

Examiner (ID: 9960)

Most Active Art Unit
1725
Art Unit(s)
1725
Total Applications
1
Issued Applications
0
Pending Applications
0
Abandoned Applications
1

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6872773 [patent_doc_number] => 20030193070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-16 [patent_title] => 'Damascene double-gate FET' [patent_app_type] => new [patent_app_number] => 10/411727 [patent_app_country] => US [patent_app_date] => 2003-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5346 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20030193070.pdf [firstpage_image] =>[orig_patent_app_number] => 10411727 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/411727
Damascene double-gate FET Apr 10, 2003 Issued
Array ( [id] => 6770056 [patent_doc_number] => 20030215996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Process for producing oxide thin films' [patent_app_type] => new [patent_app_number] => 10/410718 [patent_app_country] => US [patent_app_date] => 2003-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6700 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20030215996.pdf [firstpage_image] =>[orig_patent_app_number] => 10410718 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/410718
Process for producing oxide thin films Apr 7, 2003 Issued
Array ( [id] => 7184365 [patent_doc_number] => 20040203256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-14 [patent_title] => 'Irradiation-assisted immobilization and patterning of nanostructured materials on substrates for device fabrication' [patent_app_type] => new [patent_app_number] => 10/409217 [patent_app_country] => US [patent_app_date] => 2003-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2961 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20040203256.pdf [firstpage_image] =>[orig_patent_app_number] => 10409217 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/409217
Irradiation-assisted immobilization and patterning of nanostructured materials on substrates for device fabrication Apr 7, 2003 Abandoned
Array ( [id] => 1152003 [patent_doc_number] => 06767793 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-27 [patent_title] => 'Strained fin FETs structure and method' [patent_app_type] => B2 [patent_app_number] => 10/405844 [patent_app_country] => US [patent_app_date] => 2003-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 33 [patent_no_of_words] => 4778 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/767/06767793.pdf [firstpage_image] =>[orig_patent_app_number] => 10405844 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/405844
Strained fin FETs structure and method Apr 1, 2003 Issued
Array ( [id] => 6730295 [patent_doc_number] => 20030186485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Micro C-4 semiconductor die and method for depositing connection sites thereon' [patent_app_type] => new [patent_app_number] => 10/396558 [patent_app_country] => US [patent_app_date] => 2003-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6238 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20030186485.pdf [firstpage_image] =>[orig_patent_app_number] => 10396558 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/396558
Micro C-4 semiconductor die Mar 25, 2003 Issued
Array ( [id] => 7673301 [patent_doc_number] => 20040180478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Silicon-on-insulator ulsi devices with multiple silicon film thicknesses' [patent_app_type] => new [patent_app_number] => 10/388297 [patent_app_country] => US [patent_app_date] => 2003-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3594 [patent_no_of_claims] => 72 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20040180478.pdf [firstpage_image] =>[orig_patent_app_number] => 10388297 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/388297
Silicon-on-insulator ULSI devices with multiple silicon film thicknesses Mar 11, 2003 Issued
Array ( [id] => 6834827 [patent_doc_number] => 20030162373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-28 [patent_title] => 'Semiconductor thin film, semiconductor device employing the same, methods for manufacturing the same and device for manufacturing a semiconductor thin film' [patent_app_type] => new [patent_app_number] => 10/379539 [patent_app_country] => US [patent_app_date] => 2003-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 15218 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 24 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20030162373.pdf [firstpage_image] =>[orig_patent_app_number] => 10379539 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/379539
Semiconductor thin film, semiconductor device employing the same, methods for manufacturing the same and device for manufacturing a semiconductor thin film Mar 5, 2003 Issued
Array ( [id] => 6851603 [patent_doc_number] => 20030143806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'Processing methods of forming an electrically conductive plug to a node location' [patent_app_type] => new [patent_app_number] => 10/382801 [patent_app_country] => US [patent_app_date] => 2003-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2589 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20030143806.pdf [firstpage_image] =>[orig_patent_app_number] => 10382801 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/382801
Processing methods of forming an electrically conductive plug to a node location Mar 4, 2003 Issued
Array ( [id] => 769042 [patent_doc_number] => 07005340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-28 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/382357 [patent_app_country] => US [patent_app_date] => 2003-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2602 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/005/07005340.pdf [firstpage_image] =>[orig_patent_app_number] => 10382357 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/382357
Method for manufacturing semiconductor device Mar 4, 2003 Issued
Array ( [id] => 6740443 [patent_doc_number] => 20030157812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-21 [patent_title] => 'Method and apparatus for modifying the profile of narrow, high-aspect-ratio gaps using RF power' [patent_app_type] => new [patent_app_number] => 10/374533 [patent_app_country] => US [patent_app_date] => 2003-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13406 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20030157812.pdf [firstpage_image] =>[orig_patent_app_number] => 10374533 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/374533
Method and apparatus for modifying the profile of narrow, high-aspect-ratio gaps using RF power Feb 24, 2003 Abandoned
Array ( [id] => 1155933 [patent_doc_number] => 06762073 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-13 [patent_title] => 'Method of fabricating electronic interconnect devices using direct imaging of dielectric composite material' [patent_app_type] => B1 [patent_app_number] => 10/372747 [patent_app_country] => US [patent_app_date] => 2003-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1857 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/762/06762073.pdf [firstpage_image] =>[orig_patent_app_number] => 10372747 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/372747
Method of fabricating electronic interconnect devices using direct imaging of dielectric composite material Feb 23, 2003 Issued
Array ( [id] => 1092841 [patent_doc_number] => 06825091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-30 [patent_title] => 'Semiconductor memory device and method of manufacturing same' [patent_app_type] => B2 [patent_app_number] => 10/369717 [patent_app_country] => US [patent_app_date] => 2003-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2447 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/825/06825091.pdf [firstpage_image] =>[orig_patent_app_number] => 10369717 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/369717
Semiconductor memory device and method of manufacturing same Feb 20, 2003 Issued
Array ( [id] => 757705 [patent_doc_number] => 07015115 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-03-21 [patent_title] => 'Method for forming deep trench isolation and related structure' [patent_app_type] => utility [patent_app_number] => 10/371307 [patent_app_country] => US [patent_app_date] => 2003-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3967 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/015/07015115.pdf [firstpage_image] =>[orig_patent_app_number] => 10371307 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/371307
Method for forming deep trench isolation and related structure Feb 19, 2003 Issued
Array ( [id] => 6706459 [patent_doc_number] => 20030153193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'Etching method' [patent_app_type] => new [patent_app_number] => 10/365507 [patent_app_country] => US [patent_app_date] => 2003-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2425 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20030153193.pdf [firstpage_image] =>[orig_patent_app_number] => 10365507 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/365507
Etching method Feb 12, 2003 Abandoned
Array ( [id] => 6843288 [patent_doc_number] => 20030148635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Method of manufacturing integrated circuit' [patent_app_type] => new [patent_app_number] => 10/364707 [patent_app_country] => US [patent_app_date] => 2003-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 74 [patent_figures_cnt] => 74 [patent_no_of_words] => 33455 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20030148635.pdf [firstpage_image] =>[orig_patent_app_number] => 10364707 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/364707
Method of manufacturing integrated circuit Feb 11, 2003 Issued
Array ( [id] => 779188 [patent_doc_number] => 06995055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-07 [patent_title] => 'Structure of a semiconductor integrated circuit and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/360117 [patent_app_country] => US [patent_app_date] => 2003-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 27 [patent_no_of_words] => 6297 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/995/06995055.pdf [firstpage_image] =>[orig_patent_app_number] => 10360117 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/360117
Structure of a semiconductor integrated circuit and method of manufacturing the same Feb 6, 2003 Issued
Array ( [id] => 1126635 [patent_doc_number] => 06790752 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-14 [patent_title] => 'Methods of controlling VSS implants on memory devices, and system for performing same' [patent_app_type] => B1 [patent_app_number] => 10/358587 [patent_app_country] => US [patent_app_date] => 2003-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3517 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/790/06790752.pdf [firstpage_image] =>[orig_patent_app_number] => 10358587 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/358587
Methods of controlling VSS implants on memory devices, and system for performing same Feb 4, 2003 Issued
Array ( [id] => 1050027 [patent_doc_number] => 06861304 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-01 [patent_title] => 'Semiconductor integrated circuit device and method of manufacturing thereof' [patent_app_type] => utility [patent_app_number] => 10/357227 [patent_app_country] => US [patent_app_date] => 2003-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 6229 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/861/06861304.pdf [firstpage_image] =>[orig_patent_app_number] => 10357227 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/357227
Semiconductor integrated circuit device and method of manufacturing thereof Feb 3, 2003 Issued
Array ( [id] => 6851637 [patent_doc_number] => 20030143840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'Methods for fabricating residue-free contact openings' [patent_app_type] => new [patent_app_number] => 10/358629 [patent_app_country] => US [patent_app_date] => 2003-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3280 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20030143840.pdf [firstpage_image] =>[orig_patent_app_number] => 10358629 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/358629
Methods for fabricating residue-free contact openings Feb 3, 2003 Issued
Array ( [id] => 990746 [patent_doc_number] => 06919272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-19 [patent_title] => 'Method for patterning densely packed metal segments in a semiconductor die and related structure' [patent_app_type] => utility [patent_app_number] => 10/356447 [patent_app_country] => US [patent_app_date] => 2003-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3918 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/919/06919272.pdf [firstpage_image] =>[orig_patent_app_number] => 10356447 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/356447
Method for patterning densely packed metal segments in a semiconductor die and related structure Jan 31, 2003 Issued
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