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Stephen W. Smoot

Examiner (ID: 4681)

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
1918
Issued Applications
1744
Pending Applications
33
Abandoned Applications
142

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12692488 [patent_doc_number] => 20180122662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => HEATING DEVICE [patent_app_type] => utility [patent_app_number] => 15/793052 [patent_app_country] => US [patent_app_date] => 2017-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15793052 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/793052
Heating device Oct 24, 2017 Issued
Array ( [id] => 13242851 [patent_doc_number] => 10134633 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-11-20 [patent_title] => Self-aligned contact with CMP stop layer [patent_app_type] => utility [patent_app_number] => 15/791658 [patent_app_country] => US [patent_app_date] => 2017-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 5047 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15791658 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/791658
Self-aligned contact with CMP stop layer Oct 23, 2017 Issued
Array ( [id] => 14125251 [patent_doc_number] => 10249489 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Use of silyl bridged alkyl compounds for dense OSG films [patent_app_type] => utility [patent_app_number] => 15/789790 [patent_app_country] => US [patent_app_date] => 2017-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 6123 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15789790 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/789790
Use of silyl bridged alkyl compounds for dense OSG films Oct 19, 2017 Issued
Array ( [id] => 16609275 [patent_doc_number] => 10910289 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-02 [patent_title] => Electronic substrate and electronic apparatus [patent_app_type] => utility [patent_app_number] => 16/330963 [patent_app_country] => US [patent_app_date] => 2017-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 10142 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16330963 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/330963
Electronic substrate and electronic apparatus Oct 19, 2017 Issued
Array ( [id] => 14178151 [patent_doc_number] => 10263098 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-16 [patent_title] => Threshold voltage modulation through channel length adjustment [patent_app_type] => utility [patent_app_number] => 15/787768 [patent_app_country] => US [patent_app_date] => 2017-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6266 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15787768 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/787768
Threshold voltage modulation through channel length adjustment Oct 18, 2017 Issued
Array ( [id] => 16372484 [patent_doc_number] => 10804250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Chip-on-board display module, manufacturing method thereof, light-emitting diode device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/340150 [patent_app_country] => US [patent_app_date] => 2017-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 6593 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16340150 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/340150
Chip-on-board display module, manufacturing method thereof, light-emitting diode device and manufacturing method thereof Oct 16, 2017 Issued
Array ( [id] => 14888955 [patent_doc_number] => 10424526 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Chip package structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/782857 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2352 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15782857 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/782857
Chip package structure and manufacturing method thereof Oct 12, 2017 Issued
Array ( [id] => 14429691 [patent_doc_number] => 10319659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Semiconductor package and related methods [patent_app_type] => utility [patent_app_number] => 15/783533 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 3280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783533 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/783533
Semiconductor package and related methods Oct 12, 2017 Issued
Array ( [id] => 14110681 [patent_doc_number] => 20190097016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => RELIABLE GATE CONTACTS OVER ACTIVE AREAS [patent_app_type] => utility [patent_app_number] => 15/716705 [patent_app_country] => US [patent_app_date] => 2017-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7951 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15716705 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/716705
Reliable gate contacts over active areas Sep 26, 2017 Issued
Array ( [id] => 16944146 [patent_doc_number] => 11056397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Directional spacer removal for integrated circuit structures [patent_app_type] => utility [patent_app_number] => 16/635265 [patent_app_country] => US [patent_app_date] => 2017-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 62 [patent_no_of_words] => 11987 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16635265 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/635265
Directional spacer removal for integrated circuit structures Sep 25, 2017 Issued
Array ( [id] => 13293219 [patent_doc_number] => 10157810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Systems and methods to enhance passivation integrity [patent_app_type] => utility [patent_app_number] => 15/714099 [patent_app_country] => US [patent_app_date] => 2017-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 3990 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15714099 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/714099
Systems and methods to enhance passivation integrity Sep 24, 2017 Issued
Array ( [id] => 13950547 [patent_doc_number] => 10211052 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-02-19 [patent_title] => Systems and methods for fabrication of a redistribution layer to avoid etching of the layer [patent_app_type] => utility [patent_app_number] => 15/713524 [patent_app_country] => US [patent_app_date] => 2017-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 18294 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15713524 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/713524
Systems and methods for fabrication of a redistribution layer to avoid etching of the layer Sep 21, 2017 Issued
Array ( [id] => 14366839 [patent_doc_number] => 10304732 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => Methods and apparatus for filling substrate features with cobalt [patent_app_type] => utility [patent_app_number] => 15/711169 [patent_app_country] => US [patent_app_date] => 2017-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4757 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15711169 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/711169
Methods and apparatus for filling substrate features with cobalt Sep 20, 2017 Issued
Array ( [id] => 13709311 [patent_doc_number] => 20170365610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-21 [patent_title] => FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH EMBEDDED CAPACITOR [patent_app_type] => utility [patent_app_number] => 15/695599 [patent_app_country] => US [patent_app_date] => 2017-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4776 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15695599 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/695599
Formation method of semiconductor device with embedded capacitor Sep 4, 2017 Issued
Array ( [id] => 12129213 [patent_doc_number] => 20180012798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'METHOD AND APPARATUS FOR PLACING A GATE CONTACT INSIDE A SEMICONDUCTOR ACTIVE REGION HAVING HIGH-K DIELECTRIC GATE CAPS' [patent_app_type] => utility [patent_app_number] => 15/689413 [patent_app_country] => US [patent_app_date] => 2017-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5112 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15689413 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/689413
Method and apparatus for placing a gate contact inside a semiconductor active region having high-k dielectric gate caps Aug 28, 2017 Issued
Array ( [id] => 14429835 [patent_doc_number] => 10319731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Integrated circuit structure having VFET and embedded memory structure and method of forming same [patent_app_type] => utility [patent_app_number] => 15/673548 [patent_app_country] => US [patent_app_date] => 2017-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 7666 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15673548 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/673548
Integrated circuit structure having VFET and embedded memory structure and method of forming same Aug 9, 2017 Issued
Array ( [id] => 13950659 [patent_doc_number] => 10211108 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => Gate structures and fabrication methods thereof [patent_app_type] => utility [patent_app_number] => 15/673547 [patent_app_country] => US [patent_app_date] => 2017-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 7901 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15673547 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/673547
Gate structures and fabrication methods thereof Aug 9, 2017 Issued
Array ( [id] => 13201665 [patent_doc_number] => 10115753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-30 [patent_title] => Image sensor including pixels having plural photoelectric converters configured to convert light of different wavelengths and imaging apparatus including the same [patent_app_type] => utility [patent_app_number] => 15/670375 [patent_app_country] => US [patent_app_date] => 2017-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 49 [patent_no_of_words] => 18731 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15670375 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/670375
Image sensor including pixels having plural photoelectric converters configured to convert light of different wavelengths and imaging apparatus including the same Aug 6, 2017 Issued
Array ( [id] => 13695091 [patent_doc_number] => 20170358500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-14 [patent_title] => Horizontal Gate-All-Around Device Having Wrapped-Around Source and Drain [patent_app_type] => utility [patent_app_number] => 15/670701 [patent_app_country] => US [patent_app_date] => 2017-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6345 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15670701 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/670701
Horizontal gate-all-around device having wrapped-around source and drain Aug 6, 2017 Issued
Array ( [id] => 12061916 [patent_doc_number] => 20170338260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'PHOTODETECTOR USING BANDGAP-ENGINEERED 2D MATERIALS AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/668997 [patent_app_country] => US [patent_app_date] => 2017-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7029 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15668997 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/668997
Photodetector using bandgap-engineered 2D materials and method of manufacturing the same Aug 3, 2017 Issued
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