
Steven A. Macdonald
Examiner (ID: 4855, Phone: (571)272-8763 , Office: P/3676 )
| Most Active Art Unit | 3674 |
| Art Unit(s) | 3676, 3674 |
| Total Applications | 793 |
| Issued Applications | 606 |
| Pending Applications | 62 |
| Abandoned Applications | 144 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 415171
[patent_doc_number] => 07279351
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-10-09
[patent_title] => 'Method of passivating semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/416100
[patent_app_country] => US
[patent_app_date] => 2006-05-03
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/279/07279351.pdf
[firstpage_image] =>[orig_patent_app_number] => 11416100
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/416100 | Method of passivating semiconductor device | May 2, 2006 | Issued |
Array
(
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[patent_kind] => A1
[patent_issue_date] => 2006-03-02
[patent_title] => 'Method for fabricating a silicon carbide interconnect for semiconductor components using heating and oxidizing'
[patent_app_type] => utility
[patent_app_number] => 11/259508
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[patent_app_date] => 2005-10-26
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[firstpage_image] =>[orig_patent_app_number] => 11259508
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/259508 | Method for fabricating a silicon carbide interconnect for semiconductor components using heating | Oct 25, 2005 | Issued |
Array
(
[id] => 630359
[patent_doc_number] => 07132319
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[patent_issue_date] => 2006-11-07
[patent_title] => 'Transparent double-injection field-effect transistor'
[patent_app_type] => utility
[patent_app_number] => 11/237444
[patent_app_country] => US
[patent_app_date] => 2005-09-27
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/237444 | Transparent double-injection field-effect transistor | Sep 26, 2005 | Issued |
Array
(
[id] => 5905407
[patent_doc_number] => 20060047355
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-02
[patent_title] => 'Method and apparatus for adjusting characteristics of multi-layer electronic components'
[patent_app_type] => utility
[patent_app_number] => 11/211695
[patent_app_country] => US
[patent_app_date] => 2005-08-26
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11211695
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/211695 | Method and apparatus for adjusting characteristics of multi-layer electronic components | Aug 25, 2005 | Abandoned |
Array
(
[id] => 7111237
[patent_doc_number] => 20050208693
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[patent_issue_date] => 2005-09-22
[patent_title] => 'Method of fabricating an in-plane switching liquid crystal display device'
[patent_app_type] => utility
[patent_app_number] => 11/126266
[patent_app_country] => US
[patent_app_date] => 2005-05-11
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/126266 | Method of fabricating an in-plane switching liquid crystal display device | May 10, 2005 | Issued |
| 10/520865 | Method of forming an electrostatic discharge protecting device and integrated circuit arrangment comprising such a device | Jan 6, 2005 | Abandoned |
Array
(
[id] => 5649148
[patent_doc_number] => 20060134883
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[patent_issue_date] => 2006-06-22
[patent_title] => 'Systems and methods for electrical contacts to arrays of vertically aligned nanorods'
[patent_app_type] => utility
[patent_app_number] => 11/015665
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[patent_app_date] => 2004-12-20
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/015665 | Systems and methods for electrical contacts to arrays of vertically aligned nanorods | Dec 19, 2004 | Issued |
Array
(
[id] => 7127503
[patent_doc_number] => 20050059247
[patent_country] => US
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[patent_issue_date] => 2005-03-17
[patent_title] => 'Method for manufacturing SiC substrate'
[patent_app_type] => utility
[patent_app_number] => 10/942706
[patent_app_country] => US
[patent_app_date] => 2004-09-15
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/942706 | Method for manufacturing SiC substrate | Sep 14, 2004 | Abandoned |
Array
(
[id] => 7235441
[patent_doc_number] => 20050139831
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-30
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 10/939973
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 10939973
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/939973 | Semiconductor integrated circuit | Sep 13, 2004 | Issued |
Array
(
[id] => 7080588
[patent_doc_number] => 20050045968
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[patent_kind] => A1
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[patent_title] => 'Semiconductor device with borderless contact structure and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/939266
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/939266 | Semiconductor device with borderless contact structure and method of manufacturing the same | Sep 9, 2004 | Abandoned |
Array
(
[id] => 5903606
[patent_doc_number] => 20060046472
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-02
[patent_title] => 'Barrier layer, IC via, and IC line forming methods'
[patent_app_type] => utility
[patent_app_number] => 10/932156
[patent_app_country] => US
[patent_app_date] => 2004-09-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/932156 | Barrier layer, IC via, and IC line forming methods | Aug 31, 2004 | Issued |
Array
(
[id] => 419104
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[patent_issue_date] => 2007-10-02
[patent_title] => 'III-V group nitride system semiconductor substrate'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/928482 | III-V group nitride system semiconductor substrate | Aug 29, 2004 | Issued |
Array
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[id] => 7033274
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[patent_title] => 'System for and method of manufacturing a large-area backplane by use of a small-area shadow mask'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/925726 | System for and method of manufacturing a large-area backplane by use of a small-area shadow mask | Aug 24, 2004 | Issued |
Array
(
[id] => 5591007
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[patent_title] => 'Method to produce thin film resistor with no resistor head using dry etch'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/922296 | Method to produce thin film resistor with no resistor head using dry etch | Aug 18, 2004 | Abandoned |
Array
(
[id] => 452994
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[patent_title] => 'Method of forming strained silicon materials with improved thermal conductivity'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/903796 | Integrated circuit and methods of redistributing bondpad locations | Jul 28, 2004 | Issued |
Array
(
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[patent_title] => 'Method to selectively correct critical dimension errors in the semiconductor industry'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/710602 | Method to selectively correct critical dimension errors in the semiconductor industry | Jul 22, 2004 | Issued |
Array
(
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[patent_title] => 'Electronic semiconductor device having a thermal spreader'
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Array
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Array
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