
Steven C. Bishop
Examiner (ID: 18694)
| Most Active Art Unit | 3202 |
| Art Unit(s) | 3209, 3722, 2899, 3202 |
| Total Applications | 1994 |
| Issued Applications | 1760 |
| Pending Applications | 96 |
| Abandoned Applications | 138 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17926053
[patent_doc_number] => 11469317
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-11
[patent_title] => RC IGBT
[patent_app_type] => utility
[patent_app_number] => 17/203194
[patent_app_country] => US
[patent_app_date] => 2021-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 21
[patent_no_of_words] => 13972
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 386
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17203194
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/203194 | RC IGBT | Mar 15, 2021 | Issued |
Array
(
[id] => 18890074
[patent_doc_number] => 11868847
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-09
[patent_title] => Mitigating cross-talk in a flux tunable coupler architecture
[patent_app_type] => utility
[patent_app_number] => 17/203691
[patent_app_country] => US
[patent_app_date] => 2021-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7298
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17203691
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/203691 | Mitigating cross-talk in a flux tunable coupler architecture | Mar 15, 2021 | Issued |
Array
(
[id] => 18175312
[patent_doc_number] => 11575031
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-02-07
[patent_title] => Semiconductor element and semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/201108
[patent_app_country] => US
[patent_app_date] => 2021-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 4906
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 273
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17201108
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/201108 | Semiconductor element and semiconductor device | Mar 14, 2021 | Issued |
Array
(
[id] => 18388933
[patent_doc_number] => 11659738
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-05-23
[patent_title] => Display apparatus
[patent_app_type] => utility
[patent_app_number] => 17/199890
[patent_app_country] => US
[patent_app_date] => 2021-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 13950
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199890
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/199890 | Display apparatus | Mar 11, 2021 | Issued |
Array
(
[id] => 18379860
[patent_doc_number] => 20230154949
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-18
[patent_title] => ARRAY SUBSTRATE AND DISPLAY PANEL
[patent_app_type] => utility
[patent_app_number] => 17/281268
[patent_app_country] => US
[patent_app_date] => 2021-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8166
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17281268
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/281268 | Array substrate and display panel | Mar 10, 2021 | Issued |
Array
(
[id] => 17787939
[patent_doc_number] => 11411076
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-09
[patent_title] => Semiconductor device with fortifying layer
[patent_app_type] => utility
[patent_app_number] => 17/197313
[patent_app_country] => US
[patent_app_date] => 2021-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 7038
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 461
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197313
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/197313 | Semiconductor device with fortifying layer | Mar 9, 2021 | Issued |
Array
(
[id] => 17486284
[patent_doc_number] => 20220093788
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-24
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/197127
[patent_app_country] => US
[patent_app_date] => 2021-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5917
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 318
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197127
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/197127 | Semiconductor device | Mar 9, 2021 | Issued |
Array
(
[id] => 17941893
[patent_doc_number] => 11476355
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-18
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/197308
[patent_app_country] => US
[patent_app_date] => 2021-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 9784
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 443
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197308
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/197308 | Semiconductor device | Mar 9, 2021 | Issued |
Array
(
[id] => 17477687
[patent_doc_number] => 20220085191
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-17
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/198050
[patent_app_country] => US
[patent_app_date] => 2021-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5550
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 293
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17198050
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/198050 | Semiconductor device | Mar 9, 2021 | Issued |
Array
(
[id] => 16920827
[patent_doc_number] => 20210193919
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-24
[patent_title] => RESISTIVE MEMORY DEVICE HAVING AN OXIDE BARRIER LAYER
[patent_app_type] => utility
[patent_app_number] => 17/195310
[patent_app_country] => US
[patent_app_date] => 2021-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20468
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17195310
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/195310 | Resistive memory device having an oxide barrier layer | Mar 7, 2021 | Issued |
Array
(
[id] => 17100387
[patent_doc_number] => 20210288178
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-16
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/195002
[patent_app_country] => US
[patent_app_date] => 2021-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8035
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 253
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17195002
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/195002 | Semiconductor device | Mar 7, 2021 | Issued |
Array
(
[id] => 18016474
[patent_doc_number] => 11508781
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-22
[patent_title] => Integrating circuit elements in a stacked quantum computing device
[patent_app_type] => utility
[patent_app_number] => 17/178853
[patent_app_country] => US
[patent_app_date] => 2021-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 9838
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17178853
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/178853 | Integrating circuit elements in a stacked quantum computing device | Feb 17, 2021 | Issued |
Array
(
[id] => 17772589
[patent_doc_number] => 11404542
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-02
[patent_title] => Trench planar MOS cell for transistors
[patent_app_type] => utility
[patent_app_number] => 17/174995
[patent_app_country] => US
[patent_app_date] => 2021-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 19
[patent_no_of_words] => 4915
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 505
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17174995
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/174995 | Trench planar MOS cell for transistors | Feb 11, 2021 | Issued |
Array
(
[id] => 18503116
[patent_doc_number] => 11700905
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-18
[patent_title] => Pressure sensor to quantify work
[patent_app_type] => utility
[patent_app_number] => 17/172880
[patent_app_country] => US
[patent_app_date] => 2021-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 8764
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17172880
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/172880 | Pressure sensor to quantify work | Feb 9, 2021 | Issued |
Array
(
[id] => 18645747
[patent_doc_number] => 11769828
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-26
[patent_title] => Gate trench power semiconductor devices having improved deep shield connection patterns
[patent_app_type] => utility
[patent_app_number] => 17/172481
[patent_app_country] => US
[patent_app_date] => 2021-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 58
[patent_no_of_words] => 20877
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17172481
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/172481 | Gate trench power semiconductor devices having improved deep shield connection patterns | Feb 9, 2021 | Issued |
Array
(
[id] => 16905095
[patent_doc_number] => 20210184011
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-17
[patent_title] => Method of Implanting Dopants into a Group III-Nitride Structure and Device Formed
[patent_app_type] => utility
[patent_app_number] => 17/166775
[patent_app_country] => US
[patent_app_date] => 2021-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3875
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17166775
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/166775 | Method of implanting dopants into a group III-nitride structure and device formed | Feb 2, 2021 | Issued |
Array
(
[id] => 17115895
[patent_doc_number] => 20210296492
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-23
[patent_title] => SILICON CARBIDE SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/161867
[patent_app_country] => US
[patent_app_date] => 2021-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7451
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 361
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17161867
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/161867 | Silicon carbide semiconductor device | Jan 28, 2021 | Issued |
Array
(
[id] => 17818732
[patent_doc_number] => 11424357
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-23
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/159718
[patent_app_country] => US
[patent_app_date] => 2021-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 6393
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 272
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17159718
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/159718 | Semiconductor device | Jan 26, 2021 | Issued |
Array
(
[id] => 16850844
[patent_doc_number] => 20210151589
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-20
[patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MODULE
[patent_app_type] => utility
[patent_app_number] => 17/159093
[patent_app_country] => US
[patent_app_date] => 2021-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16077
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -25
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17159093
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/159093 | Semiconductor device and semiconductor module | Jan 25, 2021 | Issued |
Array
(
[id] => 17431980
[patent_doc_number] => 20220059689
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-24
[patent_title] => SEMICONDUCTOR DEVICE HAVING VERTICAL DMOS AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/150114
[patent_app_country] => US
[patent_app_date] => 2021-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10047
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17150114
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/150114 | Semiconductor device having vertical DMOS and manufacturing method thereof | Jan 14, 2021 | Issued |