Steven Eric Rosenwald

Array ( [id] => 9075875 [patent_doc_number] => 08553459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Nonvolatile semiconductor memory device and memory system having the same' [patent_app_type] => utility [patent_app_number] => 13/081094 [patent_app_country] => US [patent_app_date] => 2011-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 39 [patent_no_of_words] => 17319 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13081094 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9525748 [patent_doc_number] => 08750032 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-10 [patent_title] => 'Semiconductor recording device' [patent_app_type] => utility [patent_app_number] => 13/643880 [patent_app_country] => US [patent_app_date] => 2011-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 76 [patent_no_of_words] => 21042 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13643880 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8369428 [patent_doc_number] => 20120218814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'WRITE BANDWIDTH IN A MEMORY CHARACTERIZED BY A VARIABLE WRITE TIME' [patent_app_type] => utility [patent_app_number] => 13/034936 [patent_app_country] => US [patent_app_date] => 2011-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5461 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13034936 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8702695 [patent_doc_number] => 08395922 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/035134 [patent_app_country] => US [patent_app_date] => 2011-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 43 [patent_no_of_words] => 41644 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13035134 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6086588 [patent_doc_number] => 20110216571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/034750 [patent_app_country] => US [patent_app_date] => 2011-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 15877 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20110216571.pdf [firstpage_image] =>[orig_patent_app_number] => 13034750 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8369425 [patent_doc_number] => 20120218815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'Magnetic Random Access Memory (MRAM) Read With Reduced Disburb Failure' [patent_app_type] => utility [patent_app_number] => 13/035006 [patent_app_country] => US [patent_app_date] => 2011-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5162 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13035006 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9061303 [patent_doc_number] => 08547746 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-01 [patent_title] => 'Voltage generation and adjustment in a memory device' [patent_app_type] => utility [patent_app_number] => 13/034080 [patent_app_country] => US [patent_app_date] => 2011-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6917 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13034080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6013191 [patent_doc_number] => 20110222330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-15 [patent_title] => 'NONVOLATILE MEMORY DEVICE COMPRISING ONE-TIME-PROGRAMMABLE LOCK BIT REGISTER' [patent_app_type] => utility [patent_app_number] => 13/032848 [patent_app_country] => US [patent_app_date] => 2011-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7201 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20110222330.pdf [firstpage_image] =>[orig_patent_app_number] => 13032848 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9377276 [patent_doc_number] => 08681546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-25 [patent_title] => 'Variable impedance control for memory devices' [patent_app_type] => utility [patent_app_number] => 13/032560 [patent_app_country] => US [patent_app_date] => 2011-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6844 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13032560 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9217321 [patent_doc_number] => 08630126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-14 [patent_title] => 'Techniques for refreshing a semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/031906 [patent_app_country] => US [patent_app_date] => 2011-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 22465 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13031906 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8423189 [patent_doc_number] => 08279679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-02 [patent_title] => 'Non-volatile semiconductor memory device, method of reading data therefrom, and semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/979796 [patent_app_country] => US [patent_app_date] => 2010-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 8284 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12979796 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7789558 [patent_doc_number] => 20120051114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'NON-VOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/962322 [patent_app_country] => US [patent_app_date] => 2010-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5719 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20120051114.pdf [firstpage_image] =>[orig_patent_app_number] => 12962322 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9141879 [patent_doc_number] => 08582353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-12 [patent_title] => 'Nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 12/962474 [patent_app_country] => US [patent_app_date] => 2010-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 9156 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12962474 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7578847 [patent_doc_number] => 20110292730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT APPARATUS HAVING CONFIGURATION THAT ENABLES PLANE AREA REDUCTION' [patent_app_type] => utility [patent_app_number] => 12/962536 [patent_app_country] => US [patent_app_date] => 2010-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5531 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0292/20110292730.pdf [firstpage_image] =>[orig_patent_app_number] => 12962536 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7482741 [patent_doc_number] => 20110249505 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-13 [patent_title] => 'METHOD OF PROGRAMMING A SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/960996 [patent_app_country] => US [patent_app_date] => 2010-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5750 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20110249505.pdf [firstpage_image] =>[orig_patent_app_number] => 12960996 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6172824 [patent_doc_number] => 20110176371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-21 [patent_title] => 'MEMORY MODULE INCLUDING MEMORY BUFFER AND MEMORY SYSTEM HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/959504 [patent_app_country] => US [patent_app_date] => 2010-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6644 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20110176371.pdf [firstpage_image] =>[orig_patent_app_number] => 12959504 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8983520 [patent_doc_number] => 08514644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Bit line sense amplifier control circuit and semiconductor memory apparatus having the same' [patent_app_type] => utility [patent_app_number] => 12/959590 [patent_app_country] => US [patent_app_date] => 2010-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4373 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12959590 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8644141 [patent_doc_number] => 08369135 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-02-05 [patent_title] => 'Memory circuit with crossover zones of reduced line width conductors' [patent_app_type] => utility [patent_app_number] => 12/960416 [patent_app_country] => US [patent_app_date] => 2010-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1706 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12960416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8835905 [patent_doc_number] => 08451670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-28 [patent_title] => 'Adaptive and dynamic stability enhancement for memories' [patent_app_type] => utility [patent_app_number] => 12/888575 [patent_app_country] => US [patent_app_date] => 2010-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5448 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12888575 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9240707 [patent_doc_number] => 08605504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-10 [patent_title] => 'Memory system' [patent_app_type] => utility [patent_app_number] => 12/886260 [patent_app_country] => US [patent_app_date] => 2010-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 11498 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12886260 [rel_patent_id] =>[rel_patent_doc_number] =>)