Search

Steven Eric Rosenwald

Examiner (ID: 17004, Phone: (571)270-1149 , Office: P/1759 )

Most Active Art Unit
1759
Art Unit(s)
1759, 1795
Total Applications
373
Issued Applications
214
Pending Applications
0
Abandoned Applications
160

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10079665 [patent_doc_number] => 09117515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-25 [patent_title] => 'Programmable metallization cell with two dielectric layers' [patent_app_type] => utility [patent_app_number] => 13/352946 [patent_app_country] => US [patent_app_date] => 2012-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 6215 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13352946 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/352946
Programmable metallization cell with two dielectric layers Jan 17, 2012 Issued
Array ( [id] => 8369430 [patent_doc_number] => 20120218817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'NONVOLATILE MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME, AND METHOD OF OPERATING NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/342239 [patent_app_country] => US [patent_app_date] => 2012-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 14380 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13342239 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/342239
Nonvolatile memory device, memory system including the same, and method of operating nonvolatile memory device Jan 2, 2012 Issued
Array ( [id] => 8827636 [patent_doc_number] => 20130128681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-23 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/340926 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5066 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340926 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340926
Semiconductor memory apparatus Dec 29, 2011 Issued
Array ( [id] => 9246865 [patent_doc_number] => 08611155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-17 [patent_title] => 'Semiconductor memory device and program methods thereof' [patent_app_type] => utility [patent_app_number] => 13/341382 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 10892 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13341382 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/341382
Semiconductor memory device and program methods thereof Dec 29, 2011 Issued
Array ( [id] => 8840314 [patent_doc_number] => 20130135942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'PIPE LATCH CONTROL CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/341005 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13341005 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/341005
Pipe latch control circuit and semiconductor integrated circuit using the same Dec 29, 2011 Issued
Array ( [id] => 8322707 [patent_doc_number] => 20120195118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS, DATA PROGRAMMING METHOD THEREOF, AND MEMORY SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/340917 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2908 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340917 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340917
SEMICONDUCTOR MEMORY APPARATUS, DATA PROGRAMMING METHOD THEREOF, AND MEMORY SYSTEM INCLUDING THE SAME Dec 29, 2011 Abandoned
Array ( [id] => 8813281 [patent_doc_number] => 20130114326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS AND TEST CIRCUIT THEREFOR' [patent_app_type] => utility [patent_app_number] => 13/340956 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3448 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340956 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340956
Semiconductor memory apparatus and test circuit therefor Dec 29, 2011 Issued
Array ( [id] => 9128034 [patent_doc_number] => 08575985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-05 [patent_title] => 'Storage element, storage device, and signal processing circuit' [patent_app_type] => utility [patent_app_number] => 13/341412 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 65 [patent_no_of_words] => 37658 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13341412 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/341412
Storage element, storage device, and signal processing circuit Dec 29, 2011 Issued
Array ( [id] => 9678646 [patent_doc_number] => 08817566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Memory system' [patent_app_type] => utility [patent_app_number] => 13/340868 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4399 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340868 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340868
Memory system Dec 29, 2011 Issued
Array ( [id] => 8803480 [patent_doc_number] => 08441759 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-14 [patent_title] => 'Fluid dynamic bearing unit and disk drive device including the same' [patent_app_type] => utility [patent_app_number] => 13/332851 [patent_app_country] => US [patent_app_date] => 2011-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 9766 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13332851 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/332851
Fluid dynamic bearing unit and disk drive device including the same Dec 20, 2011 Issued
Array ( [id] => 8250854 [patent_doc_number] => 20120155168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'NEGATIVE VOLTAGE GENERATOR, DECODER, NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM USING NEGATIVE VOLTAGE' [patent_app_type] => utility [patent_app_number] => 13/323868 [patent_app_country] => US [patent_app_date] => 2011-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 74 [patent_figures_cnt] => 74 [patent_no_of_words] => 37514 [patent_no_of_claims] => 71 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20120155168.pdf [firstpage_image] =>[orig_patent_app_number] => 13323868 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/323868
Negative voltage generator, decoder, nonvolatile memory device and memory system using negative voltage Dec 12, 2011 Issued
Array ( [id] => 9693566 [patent_doc_number] => 08824183 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-02 [patent_title] => 'Non-volatile memory having 3D array of read/write elements with vertical bit lines and select devices and methods thereof' [patent_app_type] => utility [patent_app_number] => 13/323780 [patent_app_country] => US [patent_app_date] => 2011-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 70 [patent_figures_cnt] => 77 [patent_no_of_words] => 32138 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13323780 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/323780
Non-volatile memory having 3D array of read/write elements with vertical bit lines and select devices and methods thereof Dec 11, 2011 Issued
Array ( [id] => 9819327 [patent_doc_number] => 08929123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-06 [patent_title] => 'Resistive-switching device capable of implementing multiary addition operation and method for multiary addition operation' [patent_app_type] => utility [patent_app_number] => 13/641832 [patent_app_country] => US [patent_app_date] => 2011-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4106 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13641832 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/641832
Resistive-switching device capable of implementing multiary addition operation and method for multiary addition operation Nov 17, 2011 Issued
Array ( [id] => 8730766 [patent_doc_number] => 20130076335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'INTEGRATED CIRCUIT INCLUDING A VOLTAGE DIVIDER AND METHODS OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/241932 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4328 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13241932 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/241932
Integrated circuit including a voltage divider and methods of operating the same Sep 22, 2011 Issued
Array ( [id] => 8970173 [patent_doc_number] => 08508995 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-13 [patent_title] => 'System and method for adjusting read voltage thresholds in memories' [patent_app_type] => utility [patent_app_number] => 13/231354 [patent_app_country] => US [patent_app_date] => 2011-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7946 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13231354 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/231354
System and method for adjusting read voltage thresholds in memories Sep 12, 2011 Issued
Array ( [id] => 7816590 [patent_doc_number] => 20120063210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 13/230120 [patent_app_country] => US [patent_app_date] => 2011-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3367 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20120063210.pdf [firstpage_image] =>[orig_patent_app_number] => 13230120 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/230120
Semiconductor Device Sep 11, 2011 Abandoned
Array ( [id] => 8415828 [patent_doc_number] => 20120243328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-27 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND DATA ERASE METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 13/229938 [patent_app_country] => US [patent_app_date] => 2011-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4798 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13229938 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/229938
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND DATA ERASE METHOD OF THE SAME Sep 11, 2011 Abandoned
Array ( [id] => 9997550 [patent_doc_number] => 09042161 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Memory device' [patent_app_type] => utility [patent_app_number] => 13/230184 [patent_app_country] => US [patent_app_date] => 2011-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 96 [patent_no_of_words] => 37378 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13230184 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/230184
Memory device Sep 11, 2011 Issued
Array ( [id] => 9525740 [patent_doc_number] => 08750023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-10 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/230122 [patent_app_country] => US [patent_app_date] => 2011-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 54 [patent_no_of_words] => 25858 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13230122 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/230122
Semiconductor memory device Sep 11, 2011 Issued
Array ( [id] => 7708826 [patent_doc_number] => 20120002457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 13/230156 [patent_app_country] => US [patent_app_date] => 2011-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 11587 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13230156 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/230156
Semiconductor memory device and control method of the same Sep 11, 2011 Issued
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