Steven G.s. Sanghera
Examiner (ID: 14525)
Most Active Art Unit | 3626 |
Art Unit(s) | 3626 |
Total Applications | 175 |
Issued Applications | 36 |
Pending Applications | 70 |
Abandoned Applications | 69 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 17924484
[patent_doc_number] => 11467732
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-11
[patent_title] => Data storage system with multiple durability levels
[patent_app_type] => utility
[patent_app_number] => 16/723391
[patent_app_country] => US
[patent_app_date] => 2019-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 31
[patent_no_of_words] => 23047
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723391
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/723391 | Data storage system with multiple durability levels | Dec 19, 2019 | Issued |
Array
(
[id] => 16559181
[patent_doc_number] => 20210004330
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-07
[patent_title] => MEMORY SYSTEM, MEMORY CONTROLLER AND METHOD FOR OPERATING MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/721716
[patent_app_country] => US
[patent_app_date] => 2019-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11660
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16721716
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/721716 | Memory system, memory controller and method for operating memory system | Dec 18, 2019 | Issued |
Array
(
[id] => 15772763
[patent_doc_number] => 20200117399
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-16
[patent_title] => DATA STORAGE SYSTEM WITH MULTI-TIER CONTROL PLANE
[patent_app_type] => utility
[patent_app_number] => 16/714589
[patent_app_country] => US
[patent_app_date] => 2019-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23048
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16714589
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/714589 | Data storage system with multi-tier control plane | Dec 12, 2019 | Issued |
Array
(
[id] => 15772711
[patent_doc_number] => 20200117373
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-16
[patent_title] => MANAGING WRITE OPERATIONS DURING A POWER LOSS
[patent_app_type] => utility
[patent_app_number] => 16/706588
[patent_app_country] => US
[patent_app_date] => 2019-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6005
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706588
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/706588 | Managing write operations during a power loss | Dec 5, 2019 | Issued |
Array
(
[id] => 16856772
[patent_doc_number] => 20210157517
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-27
[patent_title] => CACHE-BASED MEMORY READ COMMANDS
[patent_app_type] => utility
[patent_app_number] => 16/694105
[patent_app_country] => US
[patent_app_date] => 2019-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10487
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16694105
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/694105 | Cache-based memory read commands | Nov 24, 2019 | Issued |
Array
(
[id] => 17863476
[patent_doc_number] => 11444641
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-13
[patent_title] => Data storage system with enforced fencing
[patent_app_type] => utility
[patent_app_number] => 16/684992
[patent_app_country] => US
[patent_app_date] => 2019-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 31
[patent_no_of_words] => 23048
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16684992
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/684992 | Data storage system with enforced fencing | Nov 14, 2019 | Issued |
Array
(
[id] => 15870681
[patent_doc_number] => 20200142744
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-07
[patent_title] => LOGICAL ADDRESS DISTRIBUTION IN MULTICORE MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/676102
[patent_app_country] => US
[patent_app_date] => 2019-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7957
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16676102
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/676102 | Logical address distribution in multicore memory system | Nov 5, 2019 | Issued |
Array
(
[id] => 17557903
[patent_doc_number] => 11314607
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-04-26
[patent_title] => Modifying aspects of a storage system associated with data mirroring
[patent_app_type] => utility
[patent_app_number] => 16/668515
[patent_app_country] => US
[patent_app_date] => 2019-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 13459
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16668515
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/668515 | Modifying aspects of a storage system associated with data mirroring | Oct 29, 2019 | Issued |
Array
(
[id] => 17492234
[patent_doc_number] => 11281537
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-03-22
[patent_title] => Managing mapped raid extents in data storage systems
[patent_app_type] => utility
[patent_app_number] => 16/590443
[patent_app_country] => US
[patent_app_date] => 2019-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7508
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16590443
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/590443 | Managing mapped raid extents in data storage systems | Oct 1, 2019 | Issued |
Array
(
[id] => 16690559
[patent_doc_number] => 20210073037
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-11
[patent_title] => ACTIVE HIBERNATE AND MANAGED MEMORY COOLING IN A NON-UNIFORM MEMORY ACCESS SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/564388
[patent_app_country] => US
[patent_app_date] => 2019-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8592
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16564388
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/564388 | Active hibernate and managed memory cooling in a non-uniform memory access system | Sep 8, 2019 | Issued |
Array
(
[id] => 16615875
[patent_doc_number] => 20210034528
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-04
[patent_title] => DYNAMICALLY ADJUSTING PREFETCH DEPTH
[patent_app_type] => utility
[patent_app_number] => 16/528901
[patent_app_country] => US
[patent_app_date] => 2019-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8363
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16528901
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/528901 | Dynamically adjusting prefetch depth | Jul 31, 2019 | Issued |
Array
(
[id] => 16615868
[patent_doc_number] => 20210034521
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-04
[patent_title] => DATA DEFINED CACHES FOR SPECULATIVE AND NORMAL EXECUTIONS
[patent_app_type] => utility
[patent_app_number] => 16/528471
[patent_app_country] => US
[patent_app_date] => 2019-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 46316
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 242
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16528471
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/528471 | Data defined caches for speculative and normal executions | Jul 30, 2019 | Issued |
Array
(
[id] => 17528452
[patent_doc_number] => 11301138
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-04-12
[patent_title] => Dynamic balancing of input/output (IO) operations for a storage system
[patent_app_type] => utility
[patent_app_number] => 16/516670
[patent_app_country] => US
[patent_app_date] => 2019-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 4842
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 263
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16516670
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/516670 | Dynamic balancing of input/output (IO) operations for a storage system | Jul 18, 2019 | Issued |
Array
(
[id] => 17437610
[patent_doc_number] => 11262942
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-03-01
[patent_title] => Integrating host-side storage device management with host-side non-volatile memory
[patent_app_type] => utility
[patent_app_number] => 16/509626
[patent_app_country] => US
[patent_app_date] => 2019-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4663
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 269
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16509626
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/509626 | Integrating host-side storage device management with host-side non-volatile memory | Jul 11, 2019 | Issued |
Array
(
[id] => 16559014
[patent_doc_number] => 20210004163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-07
[patent_title] => PERFORMING RESYNCHRONIZATION JOBS IN A DISTRIBUTED STORAGE SYSTEM BASED ON A PARALLELISM POLICY
[patent_app_type] => utility
[patent_app_number] => 16/504204
[patent_app_country] => US
[patent_app_date] => 2019-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15789
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16504204
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/504204 | Performing resynchronization jobs in a distributed storage system based on a parallelism policy | Jul 4, 2019 | Issued |
Array
(
[id] => 15027323
[patent_doc_number] => 20190324666
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-24
[patent_title] => DATA STORAGE SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/457095
[patent_app_country] => US
[patent_app_date] => 2019-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 26299
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16457095
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/457095 | Data storage system | Jun 27, 2019 | Issued |
Array
(
[id] => 16675781
[patent_doc_number] => 20210064547
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-04
[patent_title] => PREVENTION OF TRUST DOMAIN ACCESS USING MEMORY OWNERSHIP BITS IN RELATION TO CACHE LINES
[patent_app_type] => utility
[patent_app_number] => 16/456718
[patent_app_country] => US
[patent_app_date] => 2019-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22348
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16456718
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/456718 | Prevention of trust domain access using memory ownership bits in relation to cache lines | Jun 27, 2019 | Issued |
Array
(
[id] => 15412209
[patent_doc_number] => 20200026427
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-23
[patent_title] => SYSTEM AND METHOD FOR HANDLING DATA STORAGE ON STORAGE DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/452551
[patent_app_country] => US
[patent_app_date] => 2019-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9072
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16452551
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/452551 | SYSTEM AND METHOD FOR HANDLING DATA STORAGE ON STORAGE DEVICES | Jun 25, 2019 | Pending |
Array
(
[id] => 17379732
[patent_doc_number] => 11237747
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-02-01
[patent_title] => Arbitrary server metadata persistence for control plane static stability
[patent_app_type] => utility
[patent_app_number] => 16/434063
[patent_app_country] => US
[patent_app_date] => 2019-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 10852
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16434063
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/434063 | Arbitrary server metadata persistence for control plane static stability | Jun 5, 2019 | Issued |
Array
(
[id] => 16470168
[patent_doc_number] => 20200371705
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-26
[patent_title] => Just-In-Time Data Migration in a Live System
[patent_app_type] => utility
[patent_app_number] => 16/418362
[patent_app_country] => US
[patent_app_date] => 2019-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8030
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16418362
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/418362 | Just-in-time data migration in a live system | May 20, 2019 | Issued |