Search

Steven G. Snyder

Examiner (ID: 9355, Phone: (571)270-1971 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184
Total Applications
1012
Issued Applications
790
Pending Applications
59
Abandoned Applications
180

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17136466 [patent_doc_number] => 11138019 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-10-05 [patent_title] => Routing in a compilation flow for a heterogeneous multi-core architecture [patent_app_type] => utility [patent_app_number] => 16/420935 [patent_app_country] => US [patent_app_date] => 2019-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 25 [patent_no_of_words] => 13177 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16420935 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/420935
Routing in a compilation flow for a heterogeneous multi-core architecture May 22, 2019 Issued
Array ( [id] => 17120913 [patent_doc_number] => 11132044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-28 [patent_title] => Dynamic P2L asynchronous power loss mitigation [patent_app_type] => utility [patent_app_number] => 16/406779 [patent_app_country] => US [patent_app_date] => 2019-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 12137 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16406779 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/406779
Dynamic P2L asynchronous power loss mitigation May 7, 2019 Issued
Array ( [id] => 16423544 [patent_doc_number] => 20200348742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => CENTRALIZED POWER LOSS MANAGEMENT SYSTEM FOR DATA STORAGE DEVICES [patent_app_type] => utility [patent_app_number] => 16/398664 [patent_app_country] => US [patent_app_date] => 2019-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4294 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16398664 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/398664
Centralized power loss management system for data storage devices Apr 29, 2019 Issued
Array ( [id] => 16431401 [patent_doc_number] => 10831483 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-10 [patent_title] => Memory mapped virtual doorbell mechanism [patent_app_type] => utility [patent_app_number] => 16/397217 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 25 [patent_no_of_words] => 18455 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16397217 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/397217
Memory mapped virtual doorbell mechanism Apr 28, 2019 Issued
Array ( [id] => 16494470 [patent_doc_number] => 10860512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-08 [patent_title] => Processor interconnect link training system [patent_app_type] => utility [patent_app_number] => 16/396183 [patent_app_country] => US [patent_app_date] => 2019-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7988 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16396183 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/396183
Processor interconnect link training system Apr 25, 2019 Issued
Array ( [id] => 16401073 [patent_doc_number] => 20200341931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => BANDWIDTH ALLOCATION IN ASYMMETRICAL SWITCH TOPOLOGIES [patent_app_type] => utility [patent_app_number] => 16/393425 [patent_app_country] => US [patent_app_date] => 2019-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4100 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16393425 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/393425
Bandwidth allocation in asymmetrical switch topologies Apr 23, 2019 Issued
Array ( [id] => 16393234 [patent_doc_number] => 20200334175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => CONTROLLING OPERATION OF MULTIPLE COMPUTATIONAL ENGINES [patent_app_type] => utility [patent_app_number] => 16/389530 [patent_app_country] => US [patent_app_date] => 2019-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16389530 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/389530
Controlling operation of multiple computational engines Apr 18, 2019 Issued
Array ( [id] => 14688889 [patent_doc_number] => 20190243560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => METHOD AND APPARATUS FOR FINE TUNING AND OPTIMIZING NVME-OF SSDS [patent_app_type] => utility [patent_app_number] => 16/384508 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5403 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16384508 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/384508
Method and apparatus for fine tuning and optimizing NVMe-oF SSDs Apr 14, 2019 Issued
Array ( [id] => 18890012 [patent_doc_number] => 11868785 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Application program page processing method and device [patent_app_type] => utility [patent_app_number] => 16/354371 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 9509 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16354371 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/354371
Application program page processing method and device Mar 14, 2019 Issued
Array ( [id] => 14840675 [patent_doc_number] => 20190278738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => SUBSCRIBER STATION FOR A SERIAL BUS SYSTEM AND METHOD FOR DATA TRANSMISSION IN A SERIAL BUS SYSTEM [patent_app_type] => utility [patent_app_number] => 16/297146 [patent_app_country] => US [patent_app_date] => 2019-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5248 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16297146 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/297146
Subscriber station for a serial bus system and method for data transmission in a serial bus system Mar 7, 2019 Issued
Array ( [id] => 16217322 [patent_doc_number] => 10733136 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-04 [patent_title] => Vertical surface mount type C USB connector [patent_app_type] => utility [patent_app_number] => 16/290116 [patent_app_country] => US [patent_app_date] => 2019-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2732 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16290116 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/290116
Vertical surface mount type C USB connector Feb 28, 2019 Issued
Array ( [id] => 14505781 [patent_doc_number] => 20190196545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => Docking Station Having Adapter Function And End-User Device Accessory [patent_app_type] => utility [patent_app_number] => 16/288215 [patent_app_country] => US [patent_app_date] => 2019-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4739 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16288215 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/288215
Docking station having adapter function and end-user device accessory Feb 27, 2019 Issued
Array ( [id] => 15297619 [patent_doc_number] => 20190391945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => HIGH PERFORMANCE INTERCONNECT PHYSICAL LAYER [patent_app_type] => utility [patent_app_number] => 16/284742 [patent_app_country] => US [patent_app_date] => 2019-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22634 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16284742 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/284742
High performance interconnect physical layer Feb 24, 2019 Issued
Array ( [id] => 16716751 [patent_doc_number] => 20210083898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => DEVICE AND METHOD FOR A TRANSMITTER/RECEIVER DEVICE OF A BUS SYSTEM [patent_app_type] => utility [patent_app_number] => 16/970257 [patent_app_country] => US [patent_app_date] => 2019-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16970257 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/970257
Device and method for a transmitter/receiver device of a bus system Feb 19, 2019 Issued
Array ( [id] => 14872729 [patent_doc_number] => 20190286606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => NETWORK-ON-CHIP AND COMPUTER SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/265598 [patent_app_country] => US [patent_app_date] => 2019-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3249 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16265598 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/265598
NETWORK-ON-CHIP AND COMPUTER SYSTEM INCLUDING THE SAME Jan 31, 2019 Abandoned
Array ( [id] => 15820871 [patent_doc_number] => 10635615 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Safe double buffering using DMA safe linked lists [patent_app_type] => utility [patent_app_number] => 16/257467 [patent_app_country] => US [patent_app_date] => 2019-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7096 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16257467 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/257467
Safe double buffering using DMA safe linked lists Jan 24, 2019 Issued
Array ( [id] => 15167681 [patent_doc_number] => 10489335 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-26 [patent_title] => Apparatus and method and computer program product for accessing a memory card [patent_app_type] => utility [patent_app_number] => 16/256163 [patent_app_country] => US [patent_app_date] => 2019-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4100 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16256163 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/256163
Apparatus and method and computer program product for accessing a memory card Jan 23, 2019 Issued
Array ( [id] => 15215033 [patent_doc_number] => 20190370203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => Switch Board for Expanding Peripheral Component Interconnect Express Compatibility [patent_app_type] => utility [patent_app_number] => 16/257033 [patent_app_country] => US [patent_app_date] => 2019-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16257033 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/257033
Switch Board for Expanding Peripheral Component Interconnect Express Compatibility Jan 23, 2019 Abandoned
Array ( [id] => 16307236 [patent_doc_number] => 10776026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-15 [patent_title] => Dynamic data compression [patent_app_type] => utility [patent_app_number] => 16/255242 [patent_app_country] => US [patent_app_date] => 2019-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12363 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16255242 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/255242
Dynamic data compression Jan 22, 2019 Issued
Array ( [id] => 15887203 [patent_doc_number] => 10649946 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-05-12 [patent_title] => Fast link turnaround using MIPI D-PHY [patent_app_type] => utility [patent_app_number] => 16/248356 [patent_app_country] => US [patent_app_date] => 2019-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7588 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16248356 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/248356
Fast link turnaround using MIPI D-PHY Jan 14, 2019 Issued
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