Search

Steven G. Snyder

Examiner (ID: 9355, Phone: (571)270-1971 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184
Total Applications
1012
Issued Applications
790
Pending Applications
59
Abandoned Applications
180

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10393126 [patent_doc_number] => 20150278133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'Real-Time Data Acquisition Using Chained Direct Memory Access (DMA) Channels' [patent_app_type] => utility [patent_app_number] => 14/659602 [patent_app_country] => US [patent_app_date] => 2015-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4171 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14659602 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/659602
Real-time data acquisition using chained direct memory access (DMA) channels Mar 15, 2015 Issued
Array ( [id] => 10292817 [patent_doc_number] => 20150177816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/636791 [patent_app_country] => US [patent_app_date] => 2015-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7005 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14636791 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/636791
SEMICONDUCTOR INTEGRATED CIRCUIT APPARATUS Mar 2, 2015 Abandoned
Array ( [id] => 12128130 [patent_doc_number] => 20180011716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'CHIPSET RECONFIGURATION BASED ON DEVICE DETECTION' [patent_app_type] => utility [patent_app_number] => 15/545628 [patent_app_country] => US [patent_app_date] => 2015-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2020 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15545628 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/545628
Chipset reconfiguration based on device detection Feb 9, 2015 Issued
Array ( [id] => 14123491 [patent_doc_number] => 10248605 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Bidirectional lane routing [patent_app_type] => utility [patent_app_number] => 15/543200 [patent_app_country] => US [patent_app_date] => 2015-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3271 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15543200 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/543200
Bidirectional lane routing Jan 27, 2015 Issued
Array ( [id] => 10824759 [patent_doc_number] => 20160170926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-16 [patent_title] => 'APPARATUS, COMPUTER, AND METHOD OF SUPPORTING USB STORAGE DEVICE TO HOT PLUG' [patent_app_type] => utility [patent_app_number] => 14/606166 [patent_app_country] => US [patent_app_date] => 2015-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1379 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14606166 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/606166
APPARATUS, COMPUTER, AND METHOD OF SUPPORTING USB STORAGE DEVICE TO HOT PLUG Jan 26, 2015
Array ( [id] => 10808598 [patent_doc_number] => 20160154757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-02 [patent_title] => 'INTERFACE SWITCH APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/606146 [patent_app_country] => US [patent_app_date] => 2015-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1262 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14606146 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/606146
INTERFACE SWITCH APPARATUS Jan 26, 2015
Array ( [id] => 11020143 [patent_doc_number] => 20160217096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-28 [patent_title] => 'IMPLEMENTING MODAL SELECTION OF BIMODAL COHERENT ACCELERATOR' [patent_app_type] => utility [patent_app_number] => 14/606296 [patent_app_country] => US [patent_app_date] => 2015-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2341 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14606296 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/606296
Implementing modal selection of bimodal coherent accelerator Jan 26, 2015 Issued
Array ( [id] => 12291525 [patent_doc_number] => 09934186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-03 [patent_title] => Intelligent connector and bus controller [patent_app_type] => utility [patent_app_number] => 14/598757 [patent_app_country] => US [patent_app_date] => 2015-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5065 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14598757 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/598757
Intelligent connector and bus controller Jan 15, 2015 Issued
Array ( [id] => 10249870 [patent_doc_number] => 20150134867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-14 [patent_title] => 'DEVICE AND METHOD FOR INTERRUPT COALESCING' [patent_app_type] => utility [patent_app_number] => 14/597912 [patent_app_country] => US [patent_app_date] => 2015-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1943 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14597912 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/597912
DEVICE AND METHOD FOR INTERRUPT COALESCING Jan 14, 2015
Array ( [id] => 10242968 [patent_doc_number] => 20150127963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-07 [patent_title] => 'DYNAMICALLY OPTIMIZING BUS FREQUENCY OF AN INTER-INTEGRATED CIRCUIT (\'I2C\') BUS' [patent_app_type] => utility [patent_app_number] => 14/592000 [patent_app_country] => US [patent_app_date] => 2015-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5723 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14592000 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/592000
Dynamically optimizing bus frequency of an inter-integrated circuit (‘I2C’) bus Jan 7, 2015 Issued
Array ( [id] => 12332067 [patent_doc_number] => 09946683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-17 [patent_title] => Reducing precision timing measurement uncertainty [patent_app_type] => utility [patent_app_number] => 14/582734 [patent_app_country] => US [patent_app_date] => 2014-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3321 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14582734 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/582734
Reducing precision timing measurement uncertainty Dec 23, 2014 Issued
Array ( [id] => 10991561 [patent_doc_number] => 20160188506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'TRANSCEIVER MULTIPLEXING OVER USB TYPE-C INTERCONNECTS' [patent_app_type] => utility [patent_app_number] => 14/582785 [patent_app_country] => US [patent_app_date] => 2014-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5110 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14582785 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/582785
Transceiver multiplexing over USB type-C interconnects Dec 23, 2014 Issued
Array ( [id] => 12312312 [patent_doc_number] => 09940484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-10 [patent_title] => Techniques for detecting false positive return-oriented programming attacks [patent_app_type] => utility [patent_app_number] => 14/582114 [patent_app_country] => US [patent_app_date] => 2014-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12411 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14582114 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/582114
Techniques for detecting false positive return-oriented programming attacks Dec 22, 2014 Issued
Array ( [id] => 10211059 [patent_doc_number] => 20150096051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-02 [patent_title] => 'Method, Apparatus, and System for Manageability and Secure Routing and Endpoint Access' [patent_app_type] => utility [patent_app_number] => 14/565833 [patent_app_country] => US [patent_app_date] => 2014-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3572 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14565833 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/565833
Method, apparatus, and system for manageability and secure routing and endpoint access Dec 9, 2014 Issued
Array ( [id] => 12052956 [patent_doc_number] => 20170329300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'INPUT-OUTPUT DEVICE' [patent_app_type] => utility [patent_app_number] => 15/532375 [patent_app_country] => US [patent_app_date] => 2014-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5026 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15532375 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/532375
Input-output device Dec 2, 2014 Issued
Array ( [id] => 12103497 [patent_doc_number] => 09860611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-02 [patent_title] => 'Broadcast service transmitting method, broadcasting service receiving method and broadcast service receiving apparatus' [patent_app_type] => utility [patent_app_number] => 14/554246 [patent_app_country] => US [patent_app_date] => 2014-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 55 [patent_no_of_words] => 41735 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14554246 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/554246
Broadcast service transmitting method, broadcasting service receiving method and broadcast service receiving apparatus Nov 25, 2014 Issued
Array ( [id] => 9912007 [patent_doc_number] => 20150067210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'HIGH PERFORMANCE INTERCONNECT PHYSICAL LAYER' [patent_app_type] => utility [patent_app_number] => 14/538871 [patent_app_country] => US [patent_app_date] => 2014-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 23216 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14538871 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/538871
High performance interconnect physical layer Nov 11, 2014 Issued
Array ( [id] => 9912005 [patent_doc_number] => 20150067207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'HIGH PERFORMANCE INTERCONNECT PHYSICAL LAYER' [patent_app_type] => utility [patent_app_number] => 14/538897 [patent_app_country] => US [patent_app_date] => 2014-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 23875 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14538897 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/538897
HIGH PERFORMANCE INTERCONNECT PHYSICAL LAYER Nov 11, 2014 Abandoned
Array ( [id] => 9814433 [patent_doc_number] => 20150026378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-22 [patent_title] => 'METHODS AND SYSTEMS FOR REMOVAL OF INFORMATION HANDLING RESOURCES IN A SHARED INPUT/OUTPUT INFRASTRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/507300 [patent_app_country] => US [patent_app_date] => 2014-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6648 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14507300 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/507300
Methods and systems for removal of information handling resources in a shared input/output infrastructure Oct 5, 2014 Issued
Array ( [id] => 11846548 [patent_doc_number] => 09734101 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-15 [patent_title] => 'Managing over-initiative thin interrupts' [patent_app_type] => utility [patent_app_number] => 14/504513 [patent_app_country] => US [patent_app_date] => 2014-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9321 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14504513 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/504513
Managing over-initiative thin interrupts Oct 1, 2014 Issued
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