Search

Steven G. Snyder

Examiner (ID: 9355, Phone: (571)270-1971 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184
Total Applications
1012
Issued Applications
790
Pending Applications
59
Abandoned Applications
180

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18364654 [patent_doc_number] => 20230146245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => SYSTEMS AND METHODS FOR HANDLING MACRO COMPATIBILITY FOR DOCUMENTS AT A STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 18/150074 [patent_app_country] => US [patent_app_date] => 2023-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10989 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18150074 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/150074
Systems and methods for handling macro compatibility for documents at a storage system Jan 3, 2023 Issued
Array ( [id] => 18568959 [patent_doc_number] => 20230259295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => SERIALIZING EXECUTION OF REPLICATION OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/092533 [patent_app_country] => US [patent_app_date] => 2023-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18092533 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/092533
SERIALIZING EXECUTION OF REPLICATION OPERATIONS Jan 2, 2023 Abandoned
Array ( [id] => 19905763 [patent_doc_number] => 12282771 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Addition mask value generator, encryptor and method for generating stream key [patent_app_type] => utility [patent_app_number] => 18/090818 [patent_app_country] => US [patent_app_date] => 2022-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 504 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090818 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/090818
Addition mask value generator, encryptor and method for generating stream key Dec 28, 2022 Issued
Array ( [id] => 19523086 [patent_doc_number] => 12124816 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Carry-lookahead adder, secure adder and method for performing carry-lookahead addition [patent_app_type] => utility [patent_app_number] => 18/089747 [patent_app_country] => US [patent_app_date] => 2022-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4832 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18089747 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/089747
Carry-lookahead adder, secure adder and method for performing carry-lookahead addition Dec 27, 2022 Issued
Array ( [id] => 19811023 [patent_doc_number] => 12242416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Systolic neural CPU processor [patent_app_type] => utility [patent_app_number] => 18/146048 [patent_app_country] => US [patent_app_date] => 2022-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 41 [patent_no_of_words] => 9777 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18146048 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/146048
Systolic neural CPU processor Dec 22, 2022 Issued
Array ( [id] => 20635791 [patent_doc_number] => 12596665 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-07 [patent_title] => Bus-based transaction processing method and system, storage medium, and device [patent_app_type] => utility [patent_app_number] => 18/724375 [patent_app_country] => US [patent_app_date] => 2022-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2847 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18724375 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/724375
Bus-based transaction processing method and system, storage medium, and device Dec 22, 2022 Issued
Array ( [id] => 19703885 [patent_doc_number] => 12197921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Accelerating eight-way parallel Keccak execution [patent_app_type] => utility [patent_app_number] => 18/145801 [patent_app_country] => US [patent_app_date] => 2022-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 11896 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18145801 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/145801
Accelerating eight-way parallel Keccak execution Dec 21, 2022 Issued
Array ( [id] => 19413812 [patent_doc_number] => 12079632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Sequence partition based schedule optimization [patent_app_type] => utility [patent_app_number] => 18/067016 [patent_app_country] => US [patent_app_date] => 2022-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6720 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18067016 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/067016
Sequence partition based schedule optimization Dec 15, 2022 Issued
Array ( [id] => 19810848 [patent_doc_number] => 12242236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Control system and control method for remotely installed controller devices [patent_app_type] => utility [patent_app_number] => 18/079632 [patent_app_country] => US [patent_app_date] => 2022-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8712 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18079632 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/079632
Control system and control method for remotely installed controller devices Dec 11, 2022 Issued
Array ( [id] => 18298425 [patent_doc_number] => 20230108111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-06 [patent_title] => STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 18/076676 [patent_app_country] => US [patent_app_date] => 2022-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5818 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18076676 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/076676
Storage system Dec 6, 2022 Issued
Array ( [id] => 19427177 [patent_doc_number] => 12086600 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Branch target buffer with shared target bits [patent_app_type] => utility [patent_app_number] => 18/061951 [patent_app_country] => US [patent_app_date] => 2022-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2527 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18061951 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/061951
Branch target buffer with shared target bits Dec 4, 2022 Issued
Array ( [id] => 18670032 [patent_doc_number] => 11776944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Discrete three-dimensional processor [patent_app_type] => utility [patent_app_number] => 17/994374 [patent_app_country] => US [patent_app_date] => 2022-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 56 [patent_no_of_words] => 20326 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17994374 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/994374
Discrete three-dimensional processor Nov 26, 2022 Issued
Array ( [id] => 18795937 [patent_doc_number] => 11829728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Floating point adder [patent_app_type] => utility [patent_app_number] => 17/989926 [patent_app_country] => US [patent_app_date] => 2022-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 11819 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17989926 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/989926
Floating point adder Nov 17, 2022 Issued
Array ( [id] => 18378167 [patent_doc_number] => 20230153254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => COMMUNICATION METHOD, RELATED COMPUTING SYSTEM AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/986731 [patent_app_country] => US [patent_app_date] => 2022-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8243 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17986731 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/986731
Communication method, related computing system and storage medium for selecting a communication channel between modules Nov 13, 2022 Issued
Array ( [id] => 19413328 [patent_doc_number] => 12079144 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-09-03 [patent_title] => Arbitration sub-queues for a memory circuit [patent_app_type] => utility [patent_app_number] => 18/054280 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12449 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18054280 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/054280
Arbitration sub-queues for a memory circuit Nov 9, 2022 Issued
Array ( [id] => 19197792 [patent_doc_number] => 11995030 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-05-28 [patent_title] => Reconfigurable parallel processor with stacked columns forming a circular data path [patent_app_type] => utility [patent_app_number] => 17/984351 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 16633 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17984351 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/984351
Reconfigurable parallel processor with stacked columns forming a circular data path Nov 9, 2022 Issued
Array ( [id] => 18229784 [patent_doc_number] => 20230068778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => METHOD AND SYSTEM FOR IMPLEMENTING REMAINDER INSTRUCTION OF RISC-V INSTRUCTION SET [patent_app_type] => utility [patent_app_number] => 17/981339 [patent_app_country] => US [patent_app_date] => 2022-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4309 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17981339 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/981339
METHOD AND SYSTEM FOR IMPLEMENTING REMAINDER INSTRUCTION OF RISC-V INSTRUCTION SET Nov 3, 2022 Abandoned
Array ( [id] => 18237672 [patent_doc_number] => 20230069982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => METHOD AND SYSTEM FOR RENAMING INSTRUCTIONS RELATED TO FIXED CONSTANTS [patent_app_type] => utility [patent_app_number] => 17/981340 [patent_app_country] => US [patent_app_date] => 2022-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4410 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17981340 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/981340
METHOD AND SYSTEM FOR RENAMING INSTRUCTIONS RELATED TO FIXED CONSTANTS Nov 3, 2022 Abandoned
Array ( [id] => 18563072 [patent_doc_number] => 11728325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Discrete three-dimensional processor [patent_app_type] => utility [patent_app_number] => 17/975638 [patent_app_country] => US [patent_app_date] => 2022-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 56 [patent_no_of_words] => 20322 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17975638 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/975638
Discrete three-dimensional processor Oct 27, 2022 Issued
Array ( [id] => 20080945 [patent_doc_number] => 12355023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Discrete three-dimensional processor [patent_app_type] => utility [patent_app_number] => 17/971638 [patent_app_country] => US [patent_app_date] => 2022-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 56 [patent_no_of_words] => 15725 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17971638 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/971638
Discrete three-dimensional processor Oct 22, 2022 Issued
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