Search

Steven J. Fulk

Examiner (ID: 8597)

Most Active Art Unit
2891
Art Unit(s)
2891, OPLA, PTAB
Total Applications
629
Issued Applications
486
Pending Applications
6
Abandoned Applications
137

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4663671 [patent_doc_number] => 20080254578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'Method for fabricating thin film transistors' [patent_app_type] => utility [patent_app_number] => 11/882539 [patent_app_country] => US [patent_app_date] => 2007-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2040 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20080254578.pdf [firstpage_image] =>[orig_patent_app_number] => 11882539 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/882539
Method for fabricating thin film transistors Aug 1, 2007 Abandoned
Array ( [id] => 260371 [patent_doc_number] => 07573098 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-11 [patent_title] => 'Transistors fabricated using a reduced cost CMOS process' [patent_app_type] => utility [patent_app_number] => 11/833138 [patent_app_country] => US [patent_app_date] => 2007-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2922 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/573/07573098.pdf [firstpage_image] =>[orig_patent_app_number] => 11833138 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/833138
Transistors fabricated using a reduced cost CMOS process Aug 1, 2007 Issued
Array ( [id] => 42519 [patent_doc_number] => 07781246 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-24 [patent_title] => 'Method of manufacturing vertical light emitting device' [patent_app_type] => utility [patent_app_number] => 11/882259 [patent_app_country] => US [patent_app_date] => 2007-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 6465 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/781/07781246.pdf [firstpage_image] =>[orig_patent_app_number] => 11882259 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/882259
Method of manufacturing vertical light emitting device Jul 30, 2007 Issued
Array ( [id] => 4515149 [patent_doc_number] => 07932179 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-26 [patent_title] => 'Method for fabricating semiconductor device having backside redistribution layers' [patent_app_type] => utility [patent_app_number] => 11/881469 [patent_app_country] => US [patent_app_date] => 2007-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 4165 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/932/07932179.pdf [firstpage_image] =>[orig_patent_app_number] => 11881469 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/881469
Method for fabricating semiconductor device having backside redistribution layers Jul 26, 2007 Issued
Array ( [id] => 5046094 [patent_doc_number] => 20070264767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'Enhanced PMOS via transverse stress' [patent_app_type] => utility [patent_app_number] => 11/828961 [patent_app_country] => US [patent_app_date] => 2007-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1766 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20070264767.pdf [firstpage_image] =>[orig_patent_app_number] => 11828961 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/828961
Method of forming enhanced device via transverse stress Jul 25, 2007 Issued
Array ( [id] => 4775906 [patent_doc_number] => 20080283904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'TWO-BIT FLASH MEMORY CELL AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/828334 [patent_app_country] => US [patent_app_date] => 2007-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 1752 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20080283904.pdf [firstpage_image] =>[orig_patent_app_number] => 11828334 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/828334
TWO-BIT FLASH MEMORY CELL AND METHOD FOR MANUFACTURING THE SAME Jul 24, 2007 Abandoned
Array ( [id] => 5288034 [patent_doc_number] => 20090020764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-22 [patent_title] => 'GRAPHENE-BASED TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 11/778209 [patent_app_country] => US [patent_app_date] => 2007-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 7774 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20090020764.pdf [firstpage_image] =>[orig_patent_app_number] => 11778209 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/778209
Graphene-based transistor Jul 15, 2007 Issued
Array ( [id] => 4816880 [patent_doc_number] => 20080224139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'THIN FILM TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 11/775874 [patent_app_country] => US [patent_app_date] => 2007-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1911 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20080224139.pdf [firstpage_image] =>[orig_patent_app_number] => 11775874 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/775874
THIN FILM TRANSISTOR Jul 10, 2007 Abandoned
Array ( [id] => 4743347 [patent_doc_number] => 20080087948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-17 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/819853 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 1990 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20080087948.pdf [firstpage_image] =>[orig_patent_app_number] => 11819853 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/819853
Method for manufacturing a semiconductor device Jun 28, 2007 Issued
Array ( [id] => 4849464 [patent_doc_number] => 20080315206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'Highly Scalable Thin Film Transistor' [patent_app_type] => utility [patent_app_number] => 11/765269 [patent_app_country] => US [patent_app_date] => 2007-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5407 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20080315206.pdf [firstpage_image] =>[orig_patent_app_number] => 11765269 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/765269
Highly Scalable Thin Film Transistor Jun 18, 2007 Abandoned
Array ( [id] => 5125960 [patent_doc_number] => 20070238231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'THIN FILM DEVICES FOR FLAT PANEL DISPLAYS AND METHODS FOR FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/760824 [patent_app_country] => US [patent_app_date] => 2007-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3680 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20070238231.pdf [firstpage_image] =>[orig_patent_app_number] => 11760824 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/760824
Method for forming thin film devices for flat panel displays Jun 10, 2007 Issued
Array ( [id] => 4977385 [patent_doc_number] => 20070218618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'INTERLAYER DIELECTRIC UNDER STRESS FOR AN INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/754728 [patent_app_country] => US [patent_app_date] => 2007-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2400 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20070218618.pdf [firstpage_image] =>[orig_patent_app_number] => 11754728 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/754728
Interlayer dielectric under stress for an integrated circuit May 28, 2007 Issued
Array ( [id] => 5005047 [patent_doc_number] => 20070202617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'METHOD FOR FABRICATING STACKED SEMICONDUCTOR COMPONENTS WITH THROUGH WIRE INTERCONNECTS' [patent_app_type] => utility [patent_app_number] => 11/743636 [patent_app_country] => US [patent_app_date] => 2007-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 13097 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20070202617.pdf [firstpage_image] =>[orig_patent_app_number] => 11743636 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/743636
Method for fabricating stacked semiconductor components with through wire interconnects May 1, 2007 Issued
Array ( [id] => 5060417 [patent_doc_number] => 20070222054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'SEMICONDUCTOR COMPONENTS WITH THROUGH WIRE INTERCONNECTS' [patent_app_type] => utility [patent_app_number] => 11/743660 [patent_app_country] => US [patent_app_date] => 2007-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 13098 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20070222054.pdf [firstpage_image] =>[orig_patent_app_number] => 11743660 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/743660
Semiconductor components with through wire interconnects May 1, 2007 Issued
Array ( [id] => 5123537 [patent_doc_number] => 20070235807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'SEMICONDUCTOR DEVICE STRUCTURE AND METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 11/742955 [patent_app_country] => US [patent_app_date] => 2007-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2406 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20070235807.pdf [firstpage_image] =>[orig_patent_app_number] => 11742955 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/742955
Semiconductor device structure Apr 30, 2007 Issued
Array ( [id] => 888031 [patent_doc_number] => 07348264 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-25 [patent_title] => 'Plasma doping method' [patent_app_type] => utility [patent_app_number] => 11/741861 [patent_app_country] => US [patent_app_date] => 2007-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 9012 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/348/07348264.pdf [firstpage_image] =>[orig_patent_app_number] => 11741861 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/741861
Plasma doping method Apr 29, 2007 Issued
Array ( [id] => 4546331 [patent_doc_number] => 07960200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-14 [patent_title] => 'Orientation-dependent etching of deposited AlN for structural use and sacrificial layers in MEMS' [patent_app_type] => utility [patent_app_number] => 11/789578 [patent_app_country] => US [patent_app_date] => 2007-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 2297 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/960/07960200.pdf [firstpage_image] =>[orig_patent_app_number] => 11789578 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/789578
Orientation-dependent etching of deposited AlN for structural use and sacrificial layers in MEMS Apr 23, 2007 Issued
Array ( [id] => 4955000 [patent_doc_number] => 20080188024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'METHOD OF FABRICATING MICRO MECHANICAL MOVING MEMBER AND METAL INTERCONNECTS THEREOF' [patent_app_type] => utility [patent_app_number] => 11/735498 [patent_app_country] => US [patent_app_date] => 2007-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 1841 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20080188024.pdf [firstpage_image] =>[orig_patent_app_number] => 11735498 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/735498
METHOD OF FABRICATING MICRO MECHANICAL MOVING MEMBER AND METAL INTERCONNECTS THEREOF Apr 15, 2007 Abandoned
Array ( [id] => 5005089 [patent_doc_number] => 20070202659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'FinFET Body Contact Structure' [patent_app_type] => utility [patent_app_number] => 11/696331 [patent_app_country] => US [patent_app_date] => 2007-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6149 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20070202659.pdf [firstpage_image] =>[orig_patent_app_number] => 11696331 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/696331
FinFET body contact structure Apr 3, 2007 Issued
Array ( [id] => 5098669 [patent_doc_number] => 20070181929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Semiconductor Constructions, Memory Cells, DRAM Arrays, Electronic Systems; Methods of Forming Semiconductor Constructions; and Methods of Forming DRAM Arrays' [patent_app_type] => utility [patent_app_number] => 11/695407 [patent_app_country] => US [patent_app_date] => 2007-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 8903 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20070181929.pdf [firstpage_image] =>[orig_patent_app_number] => 11695407 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/695407
DRAM array and electronic system Apr 1, 2007 Issued
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