
Steven J. Fulk
Examiner (ID: 8597)
| Most Active Art Unit | 2891 |
| Art Unit(s) | 2891, OPLA, PTAB |
| Total Applications | 629 |
| Issued Applications | 486 |
| Pending Applications | 6 |
| Abandoned Applications | 137 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 159201
[patent_doc_number] => 07674691
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-09
[patent_title] => 'Method of manufacturing an electrical antifuse'
[patent_app_type] => utility
[patent_app_number] => 11/683068
[patent_app_country] => US
[patent_app_date] => 2007-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 34
[patent_no_of_words] => 7494
[patent_no_of_claims] => 6
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[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/674/07674691.pdf
[firstpage_image] =>[orig_patent_app_number] => 11683068
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/683068 | Method of manufacturing an electrical antifuse | Mar 6, 2007 | Issued |
Array
(
[id] => 5014087
[patent_doc_number] => 20070257295
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-08
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 11/713591
[patent_app_country] => US
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[pdf_file] => publications/A1/0257/20070257295.pdf
[firstpage_image] =>[orig_patent_app_number] => 11713591
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/713591 | Semiconductor memory device | Mar 4, 2007 | Abandoned |
Array
(
[id] => 4551401
[patent_doc_number] => 07820494
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-26
[patent_title] => 'Forming of the periphery of a schottky diode with MOS trenches'
[patent_app_type] => utility
[patent_app_number] => 11/713543
[patent_app_country] => US
[patent_app_date] => 2007-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/820/07820494.pdf
[firstpage_image] =>[orig_patent_app_number] => 11713543
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/713543 | Forming of the periphery of a schottky diode with MOS trenches | Mar 1, 2007 | Issued |
Array
(
[id] => 4477143
[patent_doc_number] => 07868403
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-01-11
[patent_title] => 'Integrated MEMS resonator device'
[patent_app_type] => utility
[patent_app_number] => 11/680849
[patent_app_country] => US
[patent_app_date] => 2007-03-01
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 2704
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[pdf_file] => patents/07/868/07868403.pdf
[firstpage_image] =>[orig_patent_app_number] => 11680849
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/680849 | Integrated MEMS resonator device | Feb 28, 2007 | Issued |
Array
(
[id] => 267408
[patent_doc_number] => 07566934
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-28
[patent_title] => 'Semiconductor device to suppress leak current at an end of an isolation film'
[patent_app_type] => utility
[patent_app_number] => 11/707709
[patent_app_country] => US
[patent_app_date] => 2007-02-16
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/566/07566934.pdf
[firstpage_image] =>[orig_patent_app_number] => 11707709
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/707709 | Semiconductor device to suppress leak current at an end of an isolation film | Feb 15, 2007 | Issued |
Array
(
[id] => 5233877
[patent_doc_number] => 20070126032
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-07
[patent_title] => 'FIN FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING FIN FIELD EFFECT TRANSISTOR'
[patent_app_type] => utility
[patent_app_number] => 11/673767
[patent_app_country] => US
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[pdf_file] => publications/A1/0126/20070126032.pdf
[firstpage_image] =>[orig_patent_app_number] => 11673767
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/673767 | FIN FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING FIN FIELD EFFECT TRANSISTOR | Feb 11, 2007 | Abandoned |
Array
(
[id] => 4933043
[patent_doc_number] => 20080003818
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'NANO IMPRINT TECHNIQUE WITH INCREASED FLEXIBILITY WITH RESPECT TO ALIGNMENT AND FEATURE SHAPING'
[patent_app_type] => utility
[patent_app_number] => 11/671688
[patent_app_country] => US
[patent_app_date] => 2007-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 11532
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[pdf_file] => publications/A1/0003/20080003818.pdf
[firstpage_image] =>[orig_patent_app_number] => 11671688
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/671688 | Nano imprint technique with increased flexibility with respect to alignment and feature shaping | Feb 5, 2007 | Issued |
Array
(
[id] => 5076960
[patent_doc_number] => 20070120184
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-31
[patent_title] => 'ENHANCED RESURF HVPMOS DEVICE WITH STACKED HETERO-DOPING RIM AND GRADUAL DRIFT REGION'
[patent_app_type] => utility
[patent_app_number] => 11/669233
[patent_app_country] => US
[patent_app_date] => 2007-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 4251
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[pdf_file] => publications/A1/0120/20070120184.pdf
[firstpage_image] =>[orig_patent_app_number] => 11669233
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/669233 | Method of fabricating an enhanced resurf HVPMOS device | Jan 30, 2007 | Issued |
Array
(
[id] => 20162
[patent_doc_number] => RE041669
[patent_country] => US
[patent_kind] => E1
[patent_issue_date] => 2010-09-14
[patent_title] => 'Low-cost circuit board materials and processes for area array electrical interconnections over a large area between a device and the circuit board'
[patent_app_type] => reissue
[patent_app_number] => 11/699322
[patent_app_country] => US
[patent_app_date] => 2007-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => patents/RE/041/RE041669.pdf
[firstpage_image] =>[orig_patent_app_number] => 11699322
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/699322 | Low-cost circuit board materials and processes for area array electrical interconnections over a large area between a device and the circuit board | Jan 25, 2007 | Issued |
Array
(
[id] => 5159935
[patent_doc_number] => 20070172979
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-26
[patent_title] => 'Method of manufacturing electronic device using ink-jet method'
[patent_app_type] => utility
[patent_app_number] => 11/655058
[patent_app_country] => US
[patent_app_date] => 2007-01-19
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/655058 | Method of manufacturing electronic device using ink-jet method | Jan 18, 2007 | Abandoned |
Array
(
[id] => 4749197
[patent_doc_number] => 20080157268
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-03
[patent_title] => 'Fuse Element Using Low-K Dielectric'
[patent_app_type] => utility
[patent_app_number] => 11/618749
[patent_app_country] => US
[patent_app_date] => 2006-12-30
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[firstpage_image] =>[orig_patent_app_number] => 11618749
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/618749 | Fuse Element Using Low-K Dielectric | Dec 29, 2006 | Abandoned |
Array
(
[id] => 4932993
[patent_doc_number] => 20080003768
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'CAPACITOR OF A MEMORY DEVICE AND METHOD FOR FORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/618628
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/618628 | CAPACITOR OF A MEMORY DEVICE AND METHOD FOR FORMING THE SAME | Dec 28, 2006 | Abandoned |
Array
(
[id] => 820543
[patent_doc_number] => 07407874
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-08-05
[patent_title] => 'Plasma doping method'
[patent_app_type] => utility
[patent_app_number] => 11/647149
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 11647149
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/647149 | Plasma doping method | Dec 28, 2006 | Issued |
Array
(
[id] => 4977379
[patent_doc_number] => 20070218612
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-20
[patent_title] => 'METHOD FOR FABRICATING A RECESSED-GATE MOS TRANSISTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/616298
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/616298 | METHOD FOR FABRICATING A RECESSED-GATE MOS TRANSISTOR DEVICE | Dec 26, 2006 | Abandoned |
Array
(
[id] => 4980538
[patent_doc_number] => 20070085094
[patent_country] => US
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[patent_issue_date] => 2007-04-19
[patent_title] => 'FLAT PANEL DISPLAY WITH IMPROVED WHITE BALANCE'
[patent_app_type] => utility
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[firstpage_image] =>[orig_patent_app_number] => 11610789
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/610789 | Method for manufacturing a flat panel display with improved white balance | Dec 13, 2006 | Issued |
Array
(
[id] => 5022877
[patent_doc_number] => 20070148843
[patent_country] => US
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[patent_issue_date] => 2007-06-28
[patent_title] => 'Semiconductor device and method of manufacturing the same'
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Array
(
[id] => 4829464
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[patent_title] => 'Micro-electro-mechanical systems device and integrated circuit device integrated in a three-dimensional semiconductor structure'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/601129 | Magnetic tunnel junction structure and method | Nov 14, 2006 | Issued |
Array
(
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Array
(
[id] => 5022874
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[patent_title] => 'Method of forming fin transistor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/594579 | Method of forming fin transistor | Nov 7, 2006 | Issued |