Search

Steven J. Mottola

Examiner (ID: 131, Phone: (571)272-1766 , Office: P/2842 )

Most Active Art Unit
2817
Art Unit(s)
2817, 2843, 2515, 2502, 2607, 3621, 2842
Total Applications
3603
Issued Applications
3338
Pending Applications
99
Abandoned Applications
169

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3107407 [patent_doc_number] => 05299157 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-29 [patent_title] => 'Semiconductor memories with serial sensing scheme' [patent_app_type] => 1 [patent_app_number] => 7/727114 [patent_app_country] => US [patent_app_date] => 1991-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 13134 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/299/05299157.pdf [firstpage_image] =>[orig_patent_app_number] => 727114 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/727114
Semiconductor memories with serial sensing scheme Jul 8, 1991 Issued
Array ( [id] => 3029626 [patent_doc_number] => 05303198 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-12 [patent_title] => 'Method of recording data in memory card having EEPROM and memory card system using the same' [patent_app_type] => 1 [patent_app_number] => 7/726173 [patent_app_country] => US [patent_app_date] => 1991-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6923 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/303/05303198.pdf [firstpage_image] =>[orig_patent_app_number] => 726173 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/726173
Method of recording data in memory card having EEPROM and memory card system using the same Jul 4, 1991 Issued
Array ( [id] => 2973751 [patent_doc_number] => 05265053 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-23 [patent_title] => 'Main memory DRAM interface' [patent_app_type] => 1 [patent_app_number] => 7/725571 [patent_app_country] => US [patent_app_date] => 1991-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 8077 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/265/05265053.pdf [firstpage_image] =>[orig_patent_app_number] => 725571 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/725571
Main memory DRAM interface Jul 2, 1991 Issued
07/724100 CIRCUIT ARRANGEMENT FOR OPTIONALLY AMPLIFYING SIGNALS Jun 30, 1991 Abandoned
Array ( [id] => 2998266 [patent_doc_number] => 05267199 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-30 [patent_title] => 'Apparatus for simultaneous write access to a single bit memory' [patent_app_type] => 1 [patent_app_number] => 7/723054 [patent_app_country] => US [patent_app_date] => 1991-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3284 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/267/05267199.pdf [firstpage_image] =>[orig_patent_app_number] => 723054 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/723054
Apparatus for simultaneous write access to a single bit memory Jun 27, 1991 Issued
07/721255 SEMICONDUCTOR MEMORY DEVICE Jun 25, 1991 Abandoned
Array ( [id] => 2865258 [patent_doc_number] => 05150076 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-22 [patent_title] => 'Emitter-grounded amplifier circuit with bias circuit' [patent_app_type] => 1 [patent_app_number] => 7/719812 [patent_app_country] => US [patent_app_date] => 1991-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1661 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/150/05150076.pdf [firstpage_image] =>[orig_patent_app_number] => 719812 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/719812
Emitter-grounded amplifier circuit with bias circuit Jun 23, 1991 Issued
Array ( [id] => 2982805 [patent_doc_number] => 05256987 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-26 [patent_title] => 'Power amplifier device having a plurality of power amplifier units connected in parallel' [patent_app_type] => 1 [patent_app_number] => 7/717835 [patent_app_country] => US [patent_app_date] => 1991-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6206 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/256/05256987.pdf [firstpage_image] =>[orig_patent_app_number] => 717835 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/717835
Power amplifier device having a plurality of power amplifier units connected in parallel Jun 20, 1991 Issued
07/718015 SEMICONDUCTOR STORAGE SYSTEM INCLUDING DEFECTIVE BIT REPLACEMENT Jun 19, 1991 Abandoned
Array ( [id] => 2811762 [patent_doc_number] => 05157346 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-20 [patent_title] => 'RF wideband high power amplifier' [patent_app_type] => 1 [patent_app_number] => 7/690930 [patent_app_country] => US [patent_app_date] => 1991-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2712 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/157/05157346.pdf [firstpage_image] =>[orig_patent_app_number] => 690930 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/690930
RF wideband high power amplifier Jun 18, 1991 Issued
Array ( [id] => 2906761 [patent_doc_number] => 05218321 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-08 [patent_title] => 'Low offset unity gain buffer amplifier' [patent_app_type] => 1 [patent_app_number] => 7/717347 [patent_app_country] => US [patent_app_date] => 1991-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4027 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/218/05218321.pdf [firstpage_image] =>[orig_patent_app_number] => 717347 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/717347
Low offset unity gain buffer amplifier Jun 17, 1991 Issued
Array ( [id] => 2810166 [patent_doc_number] => 05148120 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-15 [patent_title] => 'Class-AB push-pull drive circuit' [patent_app_type] => 1 [patent_app_number] => 7/717060 [patent_app_country] => US [patent_app_date] => 1991-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4182 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/148/05148120.pdf [firstpage_image] =>[orig_patent_app_number] => 717060 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/717060
Class-AB push-pull drive circuit Jun 17, 1991 Issued
Array ( [id] => 2916245 [patent_doc_number] => 05227681 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-07-13 [patent_title] => 'Integration circuit' [patent_app_type] => 1 [patent_app_number] => 7/715772 [patent_app_country] => US [patent_app_date] => 1991-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 6370 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/227/05227681.pdf [firstpage_image] =>[orig_patent_app_number] => 715772 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/715772
Integration circuit Jun 13, 1991 Issued
Array ( [id] => 2829488 [patent_doc_number] => 05170134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-08 [patent_title] => 'Fast buffer' [patent_app_type] => 1 [patent_app_number] => 7/713800 [patent_app_country] => US [patent_app_date] => 1991-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2582 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/170/05170134.pdf [firstpage_image] =>[orig_patent_app_number] => 713800 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/713800
Fast buffer Jun 11, 1991 Issued
Array ( [id] => 3032286 [patent_doc_number] => 05289413 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-22 [patent_title] => 'Dynamic semiconductor memory device with high-speed serial-accessing column decoder' [patent_app_type] => 1 [patent_app_number] => 7/712106 [patent_app_country] => US [patent_app_date] => 1991-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 28 [patent_no_of_words] => 11672 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/289/05289413.pdf [firstpage_image] =>[orig_patent_app_number] => 712106 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/712106
Dynamic semiconductor memory device with high-speed serial-accessing column decoder Jun 6, 1991 Issued
07/710512 BIPOLAR DIFFERENTIAL PAIR BASED TRANSCONDUCTANCE ELEMENT WITH IMPROVED LINEARITY AND SIGNAL TO NOISE RATIO Jun 3, 1991 Abandoned
Array ( [id] => 2959319 [patent_doc_number] => 05262919 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-16 [patent_title] => 'Semiconductor memory device including programming circuitry' [patent_app_type] => 1 [patent_app_number] => 7/709825 [patent_app_country] => US [patent_app_date] => 1991-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3132 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/262/05262919.pdf [firstpage_image] =>[orig_patent_app_number] => 709825 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/709825
Semiconductor memory device including programming circuitry Jun 3, 1991 Issued
Array ( [id] => 2955711 [patent_doc_number] => 05255226 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-19 [patent_title] => 'Semiconductor memory device with a redundancy circuit bypassing failed memory cells' [patent_app_type] => 1 [patent_app_number] => 7/709565 [patent_app_country] => US [patent_app_date] => 1991-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7116 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/255/05255226.pdf [firstpage_image] =>[orig_patent_app_number] => 709565 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/709565
Semiconductor memory device with a redundancy circuit bypassing failed memory cells Jun 2, 1991 Issued
Array ( [id] => 3055521 [patent_doc_number] => 05287311 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-15 [patent_title] => 'Method and apparatus for implementing .times.2 parity DRAM for 16 bit systems from .times.4 parity DRAM' [patent_app_type] => 1 [patent_app_number] => 7/708594 [patent_app_country] => US [patent_app_date] => 1991-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2225 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/287/05287311.pdf [firstpage_image] =>[orig_patent_app_number] => 708594 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/708594
Method and apparatus for implementing .times.2 parity DRAM for 16 bit systems from .times.4 parity DRAM May 30, 1991 Issued
Array ( [id] => 3001300 [patent_doc_number] => 05347487 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-09-13 [patent_title] => 'BICMOS latch/driver circuit, such as for a gate array memory cell' [patent_app_type] => 1 [patent_app_number] => 7/708944 [patent_app_country] => US [patent_app_date] => 1991-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 1591 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/347/05347487.pdf [firstpage_image] =>[orig_patent_app_number] => 708944 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/708944
BICMOS latch/driver circuit, such as for a gate array memory cell May 30, 1991 Issued
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