Steven L. Weinstein

Array ( [id] => 20195530 [patent_doc_number] => 20250272240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => MEMORY CONTROLLER, STORAGE DEVICE INCLUDING THE MEMORY CONTROLLER, AND METHOD OF OPERATING THE MEMORY CONTROLLER AND THE STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 19/208402 [patent_app_country] => US [patent_app_date] => 2025-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7708 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19208402 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20181040 [patent_doc_number] => 20250264998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => MEMORY MANAGEMENT METHOD AND COMPUTING DEVICE [patent_app_type] => utility [patent_app_number] => 19/197631 [patent_app_country] => US [patent_app_date] => 2025-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19197631 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20123335 [patent_doc_number] => 20250238366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => SOLID-STATE DRIVE CONFIGURATION METHOD, GARBAGE COLLECTION METHOD, AND RELATED DEVICE [patent_app_type] => utility [patent_app_number] => 19/175747 [patent_app_country] => US [patent_app_date] => 2025-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19175747 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20166555 [patent_doc_number] => 20250258602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-14 [patent_title] => OPERATION TO ERASE MULTIPLE MEMORY BLOCKS OF MULTIPLE MEMORY PLANES [patent_app_type] => utility [patent_app_number] => 19/097330 [patent_app_country] => US [patent_app_date] => 2025-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5763 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19097330 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20087366 [patent_doc_number] => 20250217302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => Adaptive Configuration of Address Translation Cache [patent_app_type] => utility [patent_app_number] => 19/087520 [patent_app_country] => US [patent_app_date] => 2025-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1113 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19087520 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20659083 [patent_doc_number] => 20260111126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-23 [patent_title] => MEMORY CIRCUITS WITH HIGH SECURITY AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 19/081550 [patent_app_country] => US [patent_app_date] => 2025-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19081550 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20221488 [patent_doc_number] => 20250284419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => POWER CYCLE DURATION BASED MEMORY INITIALIZATION [patent_app_type] => utility [patent_app_number] => 19/072804 [patent_app_country] => US [patent_app_date] => 2025-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3609 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19072804 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20296636 [patent_doc_number] => 20250321879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => ENHANCED MECHANISM FOR PARTITIONING ADDRESS SPACES [patent_app_type] => utility [patent_app_number] => 19/065855 [patent_app_country] => US [patent_app_date] => 2025-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3488 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19065855 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20017874 [patent_doc_number] => 20250156096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => OPTIMIZING DATA DEDUPLICATION BY SELECTING BETWEEN MUTLIPLE DEDUPLICATION PROCESSES [patent_app_type] => utility [patent_app_number] => 19/026235 [patent_app_country] => US [patent_app_date] => 2025-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19026235 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20094942 [patent_doc_number] => 20250224878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => QUALITY OF SERVICE MANAGEMENT MECHANISM [patent_app_type] => utility [patent_app_number] => 19/013447 [patent_app_country] => US [patent_app_date] => 2025-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1142 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19013447 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20009481 [patent_doc_number] => 20250147703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => STORAGE SYSTEM AND MEMORY CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 19/013607 [patent_app_country] => US [patent_app_date] => 2025-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19013607 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20087132 [patent_doc_number] => 20250217068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => METHOD FOR WRITING TEST PARAMETERS TO BOARD MEMORIES [patent_app_type] => utility [patent_app_number] => 19/000790 [patent_app_country] => US [patent_app_date] => 2024-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19000790 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19848713 [patent_doc_number] => 20250094064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => DATA RESYCHRONIZATION METHODS AND SYSTEMS IN CONTINUOUS DATA PROTECTION [patent_app_type] => utility [patent_app_number] => 18/969103 [patent_app_country] => US [patent_app_date] => 2024-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25316 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18969103 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19848712 [patent_doc_number] => 20250094063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => CHARGE LOSS MITIGATION THROUGH DYNAMIC PROGRAMMING SEQUENCE [patent_app_type] => utility [patent_app_number] => 18/968924 [patent_app_country] => US [patent_app_date] => 2024-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10121 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18968924 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19818887 [patent_doc_number] => 20250077094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => DATA STORING METHOD, STORAGE DEVICE, AND COMPUTER-READABLE STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/950206 [patent_app_country] => US [patent_app_date] => 2024-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9833 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18950206 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20009472 [patent_doc_number] => 20250147694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => WRITE ORDERING FOR PERSISTENT MEMORY [patent_app_type] => utility [patent_app_number] => 18/943522 [patent_app_country] => US [patent_app_date] => 2024-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10251 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18943522 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20587003 [patent_doc_number] => 20260072597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-12 [patent_title] => MEMORY MANAGEMENT METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT [patent_app_type] => utility [patent_app_number] => 18/923689 [patent_app_country] => US [patent_app_date] => 2024-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4782 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18923689 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19891839 [patent_doc_number] => 20250117151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => ENVOY FOR MULTI-TENANT COMPUTE INFRASTRUCTURE [patent_app_type] => utility [patent_app_number] => 18/923659 [patent_app_country] => US [patent_app_date] => 2024-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9772 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18923659 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19756377 [patent_doc_number] => 20250044942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => COMPUTATIONAL STORAGE DEVICE, STORAGE SYSTEM INCLUDING THE SAME AND OPERATION METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/922592 [patent_app_country] => US [patent_app_date] => 2024-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8067 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18922592 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19756406 [patent_doc_number] => 20250044971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => SUPERBLOCK SIZE MANAGEMENT IN NON-VOLATILE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/919578 [patent_app_country] => US [patent_app_date] => 2024-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7043 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18919578 [rel_patent_id] =>[rel_patent_doc_number] =>)