Search

Steven Sangyul Paik

Supervisory Patent Examiner (ID: 6689, Phone: (571)272-2404 , Office: P/2887 )

Most Active Art Unit
2876
Art Unit(s)
2887, 2819, 2876
Total Applications
602
Issued Applications
400
Pending Applications
86
Abandoned Applications
117

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1419429 [patent_doc_number] => 06529041 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-04 [patent_title] => 'System power control output circuit for programmable logic devices' [patent_app_type] => B1 [patent_app_number] => 09/816799 [patent_app_country] => US [patent_app_date] => 2001-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5918 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/529/06529041.pdf [firstpage_image] =>[orig_patent_app_number] => 09816799 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/816799
System power control output circuit for programmable logic devices Mar 22, 2001 Issued
Array ( [id] => 7090733 [patent_doc_number] => 20010032880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-25 [patent_title] => 'Bar coded navigation system' [patent_app_type] => new [patent_app_number] => 09/814054 [patent_app_country] => US [patent_app_date] => 2001-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4289 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20010032880.pdf [firstpage_image] =>[orig_patent_app_number] => 09814054 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/814054
Non-computing navigation system Mar 21, 2001 Issued
Array ( [id] => 1506002 [patent_doc_number] => 06466054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-15 [patent_title] => 'Level converter circuit' [patent_app_type] => B2 [patent_app_number] => 09/811699 [patent_app_country] => US [patent_app_date] => 2001-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 9471 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 444 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/466/06466054.pdf [firstpage_image] =>[orig_patent_app_number] => 09811699 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/811699
Level converter circuit Mar 19, 2001 Issued
Array ( [id] => 6899706 [patent_doc_number] => 20010009382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-07-26 [patent_title] => 'Row decoder with switched power supply' [patent_app_type] => new [patent_app_number] => 09/812792 [patent_app_country] => US [patent_app_date] => 2001-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2735 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20010009382.pdf [firstpage_image] =>[orig_patent_app_number] => 09812792 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/812792
Row decoder with switched power supply Mar 19, 2001 Issued
Array ( [id] => 6226890 [patent_doc_number] => 20020004926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-10 [patent_title] => 'Signal comparison system and method for detecting and correcting timing errors' [patent_app_type] => new [patent_app_number] => 09/808805 [patent_app_country] => US [patent_app_date] => 2001-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7624 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20020004926.pdf [firstpage_image] =>[orig_patent_app_number] => 09808805 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/808805
Signal comparison system and method for detecting and correcting timing errors Mar 14, 2001 Issued
Array ( [id] => 5840951 [patent_doc_number] => 20020130682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'Adaptive threshold logic circuit' [patent_app_type] => new [patent_app_number] => 09/805100 [patent_app_country] => US [patent_app_date] => 2001-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2248 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20020130682.pdf [firstpage_image] =>[orig_patent_app_number] => 09805100 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/805100
Adaptive threshold logic circuit Mar 13, 2001 Issued
Array ( [id] => 1406895 [patent_doc_number] => 06542004 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-01 [patent_title] => 'Output buffer method and apparatus with on resistance and skew control' [patent_app_type] => B1 [patent_app_number] => 09/808488 [patent_app_country] => US [patent_app_date] => 2001-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3593 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/542/06542004.pdf [firstpage_image] =>[orig_patent_app_number] => 09808488 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/808488
Output buffer method and apparatus with on resistance and skew control Mar 12, 2001 Issued
Array ( [id] => 6417888 [patent_doc_number] => 20020125915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'Logic gate with symmetrical propagation delay from any input to any output and a controlled output pulse width' [patent_app_type] => new [patent_app_number] => 09/802700 [patent_app_country] => US [patent_app_date] => 2001-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2452 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20020125915.pdf [firstpage_image] =>[orig_patent_app_number] => 09802700 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/802700
Logic gate with symmetrical propagation delay from any input to any output and a controlled output pulse width Mar 7, 2001 Issued
Array ( [id] => 6413473 [patent_doc_number] => 20020125328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'Method of loading an application program into a smart card, smart card, method of loading scripts into a smart card, terminal device capable of operating with a smart card, and storage medium holding an application program' [patent_app_type] => new [patent_app_number] => 09/798960 [patent_app_country] => US [patent_app_date] => 2001-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 13999 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20020125328.pdf [firstpage_image] =>[orig_patent_app_number] => 09798960 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/798960
METHOD OF LOADING AN APPLICATION PROGRAM INTO A SMART CARD, SMART CARD, METHOD OF LOADING SCRIPTS INTO A SMART CARD, TERMINAL DEVICE CAPABLE OF OPERATING WITH A SMART CARD, AND STORAGE MEDIUM HOLDING AN APPLICATION PROGRAM Mar 5, 2001 Issued
Array ( [id] => 6895381 [patent_doc_number] => 20010026171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-04 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => new [patent_app_number] => 09/798997 [patent_app_country] => US [patent_app_date] => 2001-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2610 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20010026171.pdf [firstpage_image] =>[orig_patent_app_number] => 09798997 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/798997
Semiconductor integrated circuit Mar 5, 2001 Issued
Array ( [id] => 1583584 [patent_doc_number] => 06424172 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Circuit structure for synthesizing time-continual filters' [patent_app_type] => B1 [patent_app_number] => 09/796996 [patent_app_country] => US [patent_app_date] => 2001-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1945 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/424/06424172.pdf [firstpage_image] =>[orig_patent_app_number] => 09796996 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/796996
Circuit structure for synthesizing time-continual filters Feb 27, 2001 Issued
Array ( [id] => 6891157 [patent_doc_number] => 20010017319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-30 [patent_title] => 'Scanner' [patent_app_type] => new [patent_app_number] => 09/793308 [patent_app_country] => US [patent_app_date] => 2001-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1885 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20010017319.pdf [firstpage_image] =>[orig_patent_app_number] => 09793308 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/793308
Scanner Feb 25, 2001 Issued
Array ( [id] => 1182315 [patent_doc_number] => 06744498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Method and device for the optical detection of foreign fibers and other impurities in a longitudinally traveling yarn' [patent_app_type] => B2 [patent_app_number] => 09/793013 [patent_app_country] => US [patent_app_date] => 2001-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3357 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744498.pdf [firstpage_image] =>[orig_patent_app_number] => 09793013 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/793013
Method and device for the optical detection of foreign fibers and other impurities in a longitudinally traveling yarn Feb 25, 2001 Issued
09/763576 METHOD AND APPARATUS FOR MEASURING THE COLOUR OF A TOOTH Feb 22, 2001 Abandoned
Array ( [id] => 1301121 [patent_doc_number] => 06628145 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-30 [patent_title] => 'High-speed logic gate' [patent_app_type] => B1 [patent_app_number] => 09/792693 [patent_app_country] => US [patent_app_date] => 2001-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7824 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/628/06628145.pdf [firstpage_image] =>[orig_patent_app_number] => 09792693 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/792693
High-speed logic gate Feb 22, 2001 Issued
Array ( [id] => 5919418 [patent_doc_number] => 20020113969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'Optical alignment system' [patent_app_type] => new [patent_app_number] => 09/789317 [patent_app_country] => US [patent_app_date] => 2001-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5899 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20020113969.pdf [firstpage_image] =>[orig_patent_app_number] => 09789317 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/789317
Optical alignment system Feb 19, 2001 Issued
Array ( [id] => 7091505 [patent_doc_number] => 20010033380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-25 [patent_title] => 'Sort stream stabilizer for flow cytometer' [patent_app_type] => new [patent_app_number] => 09/789119 [patent_app_country] => US [patent_app_date] => 2001-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3858 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20010033380.pdf [firstpage_image] =>[orig_patent_app_number] => 09789119 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/789119
Sort stream stabilizer for flow cytometer Feb 19, 2001 Issued
Array ( [id] => 1399186 [patent_doc_number] => 06552790 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-22 [patent_title] => 'System and method for facilitating wafer alignment by mitigating effects of reticle rotation on overlay' [patent_app_type] => B1 [patent_app_number] => 09/788905 [patent_app_country] => US [patent_app_date] => 2001-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 6046 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/552/06552790.pdf [firstpage_image] =>[orig_patent_app_number] => 09788905 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/788905
System and method for facilitating wafer alignment by mitigating effects of reticle rotation on overlay Feb 19, 2001 Issued
Array ( [id] => 5918687 [patent_doc_number] => 20020113620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'On-chip method and apparatus for transmission of multiple bits using quantized voltage levels' [patent_app_type] => new [patent_app_number] => 09/785592 [patent_app_country] => US [patent_app_date] => 2001-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4366 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20020113620.pdf [firstpage_image] =>[orig_patent_app_number] => 09785592 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/785592
On-chip method and apparatus for transmission of multiple bits using quantized voltage levels Feb 15, 2001 Abandoned
Array ( [id] => 7026887 [patent_doc_number] => 20010013796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-16 [patent_title] => 'Clock gate buffering circuit' [patent_app_type] => new [patent_app_number] => 09/779398 [patent_app_country] => US [patent_app_date] => 2001-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5321 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20010013796.pdf [firstpage_image] =>[orig_patent_app_number] => 09779398 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/779398
Clock gate buffering circuit Feb 7, 2001 Issued
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