Search

Stuart L. Hendrickson

Examiner (ID: 3648, Phone: (571)272-1351 , Office: P/1736 )

Most Active Art Unit
1736
Art Unit(s)
1206, 1793, 1754, 1103, 1736
Total Applications
2465
Issued Applications
1555
Pending Applications
254
Abandoned Applications
686

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20731998 [patent_doc_number] => 12639256 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-26 [patent_title] => Controllers in data processing engine columns [patent_app_type] => utility [patent_app_number] => 18/781952 [patent_app_country] => US [patent_app_date] => 2024-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6595 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18781952 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/781952
Controllers in data processing engine columns Jul 22, 2024 Issued
Array ( [id] => 19558472 [patent_doc_number] => 20240370264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => STORAGE ORGANIZATION FOR TRANSPOSING A MATRIX USING A STREAMING ENGINE [patent_app_type] => utility [patent_app_number] => 18/778174 [patent_app_country] => US [patent_app_date] => 2024-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32667 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18778174 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/778174
STORAGE ORGANIZATION FOR TRANSPOSING A MATRIX USING A STREAMING ENGINE Jul 18, 2024 Pending
Array ( [id] => 20434278 [patent_doc_number] => 12505000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-23 [patent_title] => Software visible and controllable lock-stepping with configurable logical processor granularities [patent_app_type] => utility [patent_app_number] => 18/775652 [patent_app_country] => US [patent_app_date] => 2024-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 39 [patent_no_of_words] => 10106 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18775652 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/775652
Software visible and controllable lock-stepping with configurable logical processor granularities Jul 16, 2024 Issued
Array ( [id] => 20475007 [patent_doc_number] => 20260017228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-15 [patent_title] => HARDWARE ACCELERATOR WITH CONFIGURABLE TENSOR OPERATION PIPELINE [patent_app_type] => utility [patent_app_number] => 18/769220 [patent_app_country] => US [patent_app_date] => 2024-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4400 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18769220 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/769220
HARDWARE ACCELERATOR WITH CONFIGURABLE TENSOR OPERATION PIPELINE Jul 9, 2024 Pending
Array ( [id] => 19697552 [patent_doc_number] => 20250016097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => OVER-THE-NETWORK REAL-TIME DIGITAL SIGNAL PROCESSING USING GPUS [patent_app_type] => utility [patent_app_number] => 18/765001 [patent_app_country] => US [patent_app_date] => 2024-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 62583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18765001 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/765001
OVER-THE-NETWORK REAL-TIME DIGITAL SIGNAL PROCESSING USING GPUS Jul 4, 2024 Pending
Array ( [id] => 20446903 [patent_doc_number] => 20260003625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-01 [patent_title] => SELECTIVE CONTROL MODE PROCESSING [patent_app_type] => utility [patent_app_number] => 18/756558 [patent_app_country] => US [patent_app_date] => 2024-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10959 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18756558 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/756558
SELECTIVE CONTROL MODE PROCESSING Jun 26, 2024 Pending
Array ( [id] => 20446905 [patent_doc_number] => 20260003627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-01 [patent_title] => INSTRUCTION FETCHING [patent_app_type] => utility [patent_app_number] => 18/754594 [patent_app_country] => US [patent_app_date] => 2024-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11094 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18754594 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/754594
INSTRUCTION FETCHING Jun 25, 2024 Pending
Array ( [id] => 19466515 [patent_doc_number] => 20240320185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => DETERMINISTIC MEMORY FOR TENSOR STREAMING PROCESSORS [patent_app_type] => utility [patent_app_number] => 18/731952 [patent_app_country] => US [patent_app_date] => 2024-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18731952 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/731952
Deterministic memory for tensor streaming processors Jun 2, 2024 Issued
Array ( [id] => 20537474 [patent_doc_number] => 12554551 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Systems, methods, and apparatus for associating computational device functions with compute engines [patent_app_type] => utility [patent_app_number] => 18/669519 [patent_app_country] => US [patent_app_date] => 2024-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4067 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18669519 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/669519
Systems, methods, and apparatus for associating computational device functions with compute engines May 19, 2024 Issued
Array ( [id] => 20310717 [patent_doc_number] => 20250328346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-23 [patent_title] => INSTRUCTION WITH A PRESERVE SIGN CONTROL [patent_app_type] => utility [patent_app_number] => 18/641656 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14913 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641656 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/641656
INSTRUCTION WITH A PRESERVE SIGN CONTROL Apr 21, 2024 Pending
Array ( [id] => 19530378 [patent_doc_number] => 20240354280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => COMPUTING ARRAY USING GLOBAL NODE PROCESSING [patent_app_type] => utility [patent_app_number] => 18/639452 [patent_app_country] => US [patent_app_date] => 2024-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1929 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18639452 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/639452
COMPUTING ARRAY USING GLOBAL NODE PROCESSING Apr 17, 2024 Abandoned
Array ( [id] => 19530208 [patent_doc_number] => 20240354110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => RUNTIME ADAPTIVE PREFETCHING IN A MANY-CORE SYSTEM [patent_app_type] => utility [patent_app_number] => 18/639815 [patent_app_country] => US [patent_app_date] => 2024-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7939 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18639815 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/639815
RUNTIME ADAPTIVE PREFETCHING IN A MANY-CORE SYSTEM Apr 17, 2024 Pending
Array ( [id] => 20296500 [patent_doc_number] => 20250321743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => Apparatus and Method for Improving Instruction Fusion, Fracture, and Binary Translation [patent_app_type] => utility [patent_app_number] => 18/635212 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6016 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635212 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635212
Apparatus and method for improving instruction fusion, fracture, and binary translation Apr 14, 2024 Issued
Array ( [id] => 19334288 [patent_doc_number] => 20240248718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => INLINE DATA INSPECTION FOR WORKLOAD SIMPLIFICATION [patent_app_type] => utility [patent_app_number] => 18/625903 [patent_app_country] => US [patent_app_date] => 2024-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9441 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18625903 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/625903
Inline data inspection for workload simplification Apr 2, 2024 Issued
Array ( [id] => 20281700 [patent_doc_number] => 20250306942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => RESCHEDULING WORK ONTO PERSISTENT THREADS [patent_app_type] => utility [patent_app_number] => 18/618838 [patent_app_country] => US [patent_app_date] => 2024-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1090 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618838 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/618838
RESCHEDULING WORK ONTO PERSISTENT THREADS Mar 26, 2024 Pending
Array ( [id] => 20281692 [patent_doc_number] => 20250306934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => ACCELERATOR CONTEXT SWITCHING [patent_app_type] => utility [patent_app_number] => 18/616973 [patent_app_country] => US [patent_app_date] => 2024-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18616973 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/616973
ACCELERATOR CONTEXT SWITCHING Mar 25, 2024 Abandoned
Array ( [id] => 20304071 [patent_doc_number] => 12450059 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Method for control flow isolation with protection keys and indirect branch tracking [patent_app_type] => utility [patent_app_number] => 18/613319 [patent_app_country] => US [patent_app_date] => 2024-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5243 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18613319 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/613319
Method for control flow isolation with protection keys and indirect branch tracking Mar 21, 2024 Issued
Array ( [id] => 19660537 [patent_doc_number] => 20240427602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => MULTI-CONDITION BRANCH INSTRUCTION FOR CONDITIONAL BRANCH OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/603815 [patent_app_country] => US [patent_app_date] => 2024-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10091 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18603815 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/603815
MULTI-CONDITION BRANCH INSTRUCTION FOR CONDITIONAL BRANCH OPERATIONS Mar 12, 2024 Pending
Array ( [id] => 19434579 [patent_doc_number] => 20240303077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => SEMICONDUCTOR DEVICE, CORRELATION VALUE OPERATION METHOD, AND RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 18/597808 [patent_app_country] => US [patent_app_date] => 2024-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4015 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597808 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/597808
SEMICONDUCTOR DEVICE, CORRELATION VALUE OPERATION METHOD, AND RECORDING MEDIUM Mar 5, 2024 Pending
Array ( [id] => 20304067 [patent_doc_number] => 12450055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Vector SIMD VLIW data path architecture [patent_app_type] => utility [patent_app_number] => 18/594461 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 25 [patent_no_of_words] => 5198 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18594461 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/594461
Vector SIMD VLIW data path architecture Mar 3, 2024 Issued
Menu