
Suchin Parihar
Examiner (ID: 4481)
| Most Active Art Unit | 2851 |
| Art Unit(s) | 2825, 2851, 2872 |
| Total Applications | 1385 |
| Issued Applications | 1167 |
| Pending Applications | 109 |
| Abandoned Applications | 148 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10065034
[patent_doc_number] => 09103878
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-08-11
[patent_title] => 'Method for scan testing three-dimensional chip'
[patent_app_type] => utility
[patent_app_number] => 14/394296
[patent_app_country] => US
[patent_app_date] => 2013-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6562
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14394296
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/394296 | Method for scan testing three-dimensional chip | Apr 16, 2013 | Issued |
Array
(
[id] => 9746613
[patent_doc_number] => 20140282332
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-18
[patent_title] => 'FAULT INJECTION OF FINFET DEVICES'
[patent_app_type] => utility
[patent_app_number] => 13/864725
[patent_app_country] => US
[patent_app_date] => 2013-04-17
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/864725 | Fault injection of finFET devices | Apr 16, 2013 | Issued |
Array
(
[id] => 9110087
[patent_doc_number] => 20130283219
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-24
[patent_title] => 'METHOD AND SYSTEM FOR FORMING PATTERNS USING CHARGED PARTICLE BEAM LITHOGRAPHY'
[patent_app_type] => utility
[patent_app_number] => 13/862475
[patent_app_country] => US
[patent_app_date] => 2013-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_words] => 11448
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/862475 | Method and system for forming patterns using charged particle beam lithography | Apr 14, 2013 | Issued |
Array
(
[id] => 9282985
[patent_doc_number] => 20140032953
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-30
[patent_title] => 'BATTERY CHARGE SYSTEM AND METHOD CAPABLE OF OPERATING IN DIFFERENT CONFIGURATIONS'
[patent_app_type] => utility
[patent_app_number] => 13/850977
[patent_app_country] => US
[patent_app_date] => 2013-03-26
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/850977 | Battery charge system and method capable of operating in different configurations | Mar 25, 2013 | Issued |
Array
(
[id] => 9758994
[patent_doc_number] => 20140289695
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-25
[patent_title] => 'EVALUATION OF PIN GEOMETRY ACCESSIBILITY IN A LAYER OF CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 13/849575
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/849575 | Evaluation of pin geometry accessibility in a layer of circuit | Mar 24, 2013 | Issued |
Array
(
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[patent_doc_number] => 08793626
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-29
[patent_title] => 'Computational lithography with feature upsizing'
[patent_app_type] => utility
[patent_app_number] => 13/849195
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[patent_app_date] => 2013-03-22
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Array
(
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[patent_doc_number] => 08645891
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[patent_issue_date] => 2014-02-04
[patent_title] => 'Device for and method of generating wiring data, and imaging system'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/835398 | Device for and method of generating wiring data, and imaging system | Mar 14, 2013 | Issued |
Array
(
[id] => 10046774
[patent_doc_number] => 09087174
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[patent_issue_date] => 2015-07-21
[patent_title] => 'Methods, systems, and articles of manufacture for implementing multiple-patterning-aware design rule check for electronic designs'
[patent_app_type] => utility
[patent_app_number] => 13/840567
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/840567 | Methods, systems, and articles of manufacture for implementing multiple-patterning-aware design rule check for electronic designs | Mar 14, 2013 | Issued |
Array
(
[id] => 9548722
[patent_doc_number] => 20140173370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-19
[patent_title] => 'DEBUG SYSTEM, APPARATUS AND METHOD THEREOF FOR PROVIDING GRAPHICAL PIN INTERFACE'
[patent_app_type] => utility
[patent_app_number] => 13/842154
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/842154 | Debug system, apparatus and method thereof for providing graphical pin interface | Mar 14, 2013 | Issued |
Array
(
[id] => 9853151
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[patent_issue_date] => 2015-02-10
[patent_title] => 'Source-mask optimization for a lithography process'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/836327 | Source-mask optimization for a lithography process | Mar 14, 2013 | Issued |
Array
(
[id] => 9486667
[patent_doc_number] => 08732630
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[patent_issue_date] => 2014-05-20
[patent_title] => 'Methods, systems, and articles of manufacture for implementing analog behavioral modeling and IP integration using systemverilog hardware description language'
[patent_app_type] => utility
[patent_app_number] => 13/831958
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/831958 | Methods, systems, and articles of manufacture for implementing analog behavioral modeling and IP integration using systemverilog hardware description language | Mar 14, 2013 | Issued |
Array
(
[id] => 9746609
[patent_doc_number] => 20140282328
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[patent_issue_date] => 2014-09-18
[patent_title] => 'DESIGN RULE CHECKS IN 3-D VIRTUAL FABRICATION ENVIRONMENT'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/831444 | Rule checks in 3-D virtual fabrication environment | Mar 13, 2013 | Issued |
Array
(
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[patent_title] => 'Verifying proper representation of semiconductor device fingers'
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Array
(
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[patent_title] => 'Methods and apparatus for RC extraction'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/795814 | Methods and apparatus for RC extraction | Mar 11, 2013 | Issued |
Array
(
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Array
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[patent_title] => 'System and method for automatic timing-based register placement and register location adjustment in an integrated circuit (IC)'
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Array
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Array
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/003711 | THIN FILM BATTERY CHARGE CONTROL AND METHOD | Feb 21, 2013 | Abandoned |