Search

Suchin Parihar

Examiner (ID: 4481)

Most Active Art Unit
2851
Art Unit(s)
2825, 2851, 2872
Total Applications
1385
Issued Applications
1167
Pending Applications
109
Abandoned Applications
148

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9847815 [patent_doc_number] => 08949749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-03 [patent_title] => 'Layout design for electron-beam high volume manufacturing' [patent_app_type] => utility [patent_app_number] => 13/657992 [patent_app_country] => US [patent_app_date] => 2012-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 30 [patent_no_of_words] => 6142 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13657992 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/657992
Layout design for electron-beam high volume manufacturing Oct 22, 2012 Issued
Array ( [id] => 8672590 [patent_doc_number] => 20130047128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-21 [patent_title] => 'Method and Apparatus for Using Entropy in An Colony Optimization Circuit Design from High Level Synthesis' [patent_app_type] => utility [patent_app_number] => 13/658760 [patent_app_country] => US [patent_app_date] => 2012-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12703 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13658760 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/658760
Using entropy in an colony optimization circuit design from high level synthesis Oct 22, 2012 Issued
Array ( [id] => 8661386 [patent_doc_number] => 20130042215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-14 [patent_title] => 'Methods and Apparatuses for Automated Circuit Design' [patent_app_type] => utility [patent_app_number] => 13/652425 [patent_app_country] => US [patent_app_date] => 2012-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8306 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13652425 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/652425
Automated circuit design Oct 14, 2012 Issued
Array ( [id] => 10086761 [patent_doc_number] => 09124117 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-01 [patent_title] => 'Charging device' [patent_app_type] => utility [patent_app_number] => 14/115189 [patent_app_country] => US [patent_app_date] => 2012-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3499 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14115189 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/115189
Charging device Sep 30, 2012 Issued
Array ( [id] => 9386385 [patent_doc_number] => 20140089868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'AUTOMATED REPAIR METHOD AND SYSTEM FOR DOUBLE PATTERNING CONFLICTS' [patent_app_type] => utility [patent_app_number] => 13/628002 [patent_app_country] => US [patent_app_date] => 2012-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6952 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628002 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628002
Automated repair method and system for double patterning conflicts Sep 25, 2012 Issued
Array ( [id] => 9668477 [patent_doc_number] => 20140232340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-21 [patent_title] => 'Battery Use Optimization Utilizing A Reserve Fleet' [patent_app_type] => utility [patent_app_number] => 14/346830 [patent_app_country] => US [patent_app_date] => 2012-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1878 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14346830 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/346830
Battery use optimization utilizing a reserve fleet Sep 23, 2012 Issued
Array ( [id] => 9654557 [patent_doc_number] => 20140225562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-14 [patent_title] => 'WIRELESSLY RECHARGEABLE BATTERY AND COMPONENTS THEREOF' [patent_app_type] => utility [patent_app_number] => 14/347096 [patent_app_country] => US [patent_app_date] => 2012-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1693 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14347096 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/347096
Wirelessly rechargeable battery and components thereof Sep 23, 2012 Issued
Array ( [id] => 9029813 [patent_doc_number] => 08539410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-17 [patent_title] => 'Semiconductor device, adjustment method thereof and data processing system' [patent_app_type] => utility [patent_app_number] => 13/620819 [patent_app_country] => US [patent_app_date] => 2012-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 18100 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13620819 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/620819
Semiconductor device, adjustment method thereof and data processing system Sep 14, 2012 Issued
Array ( [id] => 10543757 [patent_doc_number] => 09268890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-23 [patent_title] => 'Designing photonic switching systems utilizing equalized drivers' [patent_app_type] => utility [patent_app_number] => 13/619049 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7598 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13619049 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/619049
Designing photonic switching systems utilizing equalized drivers Sep 13, 2012 Issued
Array ( [id] => 9365532 [patent_doc_number] => 20140075405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-13 [patent_title] => 'METHOD OF ANALYZING INTERCONNECT FOR GLOBAL CIRCUIT WIRES' [patent_app_type] => utility [patent_app_number] => 13/608012 [patent_app_country] => US [patent_app_date] => 2012-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6501 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13608012 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/608012
Method of analyzing interconnect for global circuit wires Sep 9, 2012 Issued
Array ( [id] => 9707538 [patent_doc_number] => 08832634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-09 [patent_title] => 'Integrated circuit characterization based on measured and static apparent resistances' [patent_app_type] => utility [patent_app_number] => 13/603972 [patent_app_country] => US [patent_app_date] => 2012-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3977 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13603972 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/603972
Integrated circuit characterization based on measured and static apparent resistances Sep 4, 2012 Issued
Array ( [id] => 9341750 [patent_doc_number] => 20140068534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'Designing Photonic Switching Systems Utilizing Equalized Drivers' [patent_app_type] => utility [patent_app_number] => 13/604337 [patent_app_country] => US [patent_app_date] => 2012-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6767 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604337 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/604337
Designing photonic switching systems utilizing equalized drivers Sep 4, 2012 Issued
Array ( [id] => 9077634 [patent_doc_number] => 08555226 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-10-08 [patent_title] => 'Automatic verification of dependency' [patent_app_type] => utility [patent_app_number] => 13/603402 [patent_app_country] => US [patent_app_date] => 2012-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6493 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13603402 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/603402
Automatic verification of dependency Sep 3, 2012 Issued
Array ( [id] => 9143584 [patent_doc_number] => 08584066 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-11-12 [patent_title] => 'System and method for generating a wire model' [patent_app_type] => utility [patent_app_number] => 13/603052 [patent_app_country] => US [patent_app_date] => 2012-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3377 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13603052 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/603052
System and method for generating a wire model Sep 3, 2012 Issued
Array ( [id] => 9023647 [patent_doc_number] => 08533646 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-09-10 [patent_title] => 'Apparatus, method and medium storing program for designing semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 13/600502 [patent_app_country] => US [patent_app_date] => 2012-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 2928 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13600502 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/600502
Apparatus, method and medium storing program for designing semiconductor integrated circuit Aug 30, 2012 Issued
Array ( [id] => 8924089 [patent_doc_number] => 08490038 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-07-16 [patent_title] => 'System and method for automatic placement of contact cuts and similar structures in integrated circuit layouts' [patent_app_type] => utility [patent_app_number] => 13/595942 [patent_app_country] => US [patent_app_date] => 2012-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 5856 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13595942 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/595942
System and method for automatic placement of contact cuts and similar structures in integrated circuit layouts Aug 26, 2012 Issued
Array ( [id] => 8504736 [patent_doc_number] => 20120304144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'Power Mesh Managing Method' [patent_app_type] => utility [patent_app_number] => 13/568228 [patent_app_country] => US [patent_app_date] => 2012-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3899 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13568228 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/568228
Power mesh managing method Aug 6, 2012 Issued
Array ( [id] => 9199493 [patent_doc_number] => 20130338808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'Method and Apparatus for Hierarchical Wafer Quality Predictive Modeling' [patent_app_type] => utility [patent_app_number] => 13/559500 [patent_app_country] => US [patent_app_date] => 2012-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10078 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13559500 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/559500
Method and Apparatus for Hierarchical Wafer Quality Predictive Modeling Jul 25, 2012 Abandoned
Array ( [id] => 8611015 [patent_doc_number] => 20130016327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-17 [patent_title] => 'LITHOGRAPHY SYSTEM AND METHOD FOR STORING POSITIONAL DATA OF A TARGET' [patent_app_type] => utility [patent_app_number] => 13/545896 [patent_app_country] => US [patent_app_date] => 2012-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5599 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13545896 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/545896
Lithography system and method for storing positional data of a target Jul 9, 2012 Issued
Array ( [id] => 9200603 [patent_doc_number] => 20130339919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'Method and Apparatus for Hierarchical Wafer Quality Predictive Modeling' [patent_app_type] => utility [patent_app_number] => 13/526152 [patent_app_country] => US [patent_app_date] => 2012-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10023 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13526152 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/526152
Method and apparatus for hierarchical wafer quality predictive modeling Jun 17, 2012 Issued
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