
Suchin Parihar
Examiner (ID: 4481, Phone: (571)272-6210 , Office: P/2851 )
| Most Active Art Unit | 2851 |
| Art Unit(s) | 2825, 2851, 2872 |
| Total Applications | 1385 |
| Issued Applications | 1167 |
| Pending Applications | 109 |
| Abandoned Applications | 148 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4966382
[patent_doc_number] => 20080109202
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[patent_kind] => A1
[patent_issue_date] => 2008-05-08
[patent_title] => 'VERIFICATION AND REACHABILITY USING AN ORGANIC APPROACH'
[patent_app_type] => utility
[patent_app_number] => 11/924291
[patent_app_country] => US
[patent_app_date] => 2007-10-25
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0109/20080109202.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/924291 | Verification and reachability using an organic approach | Oct 24, 2007 | Issued |
Array
(
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[patent_doc_number] => 20080105904
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[patent_kind] => A1
[patent_issue_date] => 2008-05-08
[patent_title] => 'Method for variability constraints in design of integrated circuits especially digital circuits which includes timing closure upon placement and routing of digital circuit or network'
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Array
(
[id] => 4787864
[patent_doc_number] => 20080141193
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[patent_issue_date] => 2008-06-12
[patent_title] => 'Properties In Electronic Design Automation'
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Array
(
[id] => 4693941
[patent_doc_number] => 20080086712
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[patent_issue_date] => 2008-04-10
[patent_title] => 'METHOD OF DESIGNING A PATTERN'
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[patent_app_date] => 2007-10-05
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/866231 | METHOD FOR INCREMENTAL, TIMING-DRIVEN, PHYSICAL-SYNTHESIS OPTIMIZATION | Oct 1, 2007 | Abandoned |
Array
(
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[patent_issue_date] => 2010-05-11
[patent_title] => 'Solution-dependent regularization method for quantizing continuous-tone lithography masks'
[patent_app_type] => utility
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Array
(
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[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-02-19
[patent_title] => 'Circuit-design supporting apparatus, circuit-design supporting method, computer product, and printed-circuit-board manufacturing method'
[patent_app_type] => utility
[patent_app_number] => 11/905321
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Array
(
[id] => 7726407
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[patent_kind] => B2
[patent_issue_date] => 2012-01-17
[patent_title] => 'Interchangeable connection arrays for double-sided DIMM placement'
[patent_app_type] => utility
[patent_app_number] => 11/899497
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/899497 | Interchangeable connection arrays for double-sided DIMM placement | Sep 4, 2007 | Issued |
Array
(
[id] => 118462
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[patent_country] => US
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[patent_issue_date] => 2010-05-11
[patent_title] => 'Redundant critical path circuits to meet performance requirement'
[patent_app_type] => utility
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Array
(
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Array
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Array
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Array
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Array
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Array
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Array
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